74AUP1G02

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Product data sheet

Rev. 6 — 27 June 2012

3 of 21

NXP Semiconductors

74AUP1G02

Low-power 2-input NOR gate

6.

Pinning information

6.1 Pinning

6.2 Pin description

Fig 4.

Pin configuration SOT353-1

Fig 5.

Pin configuration SOT886

74AUP1G02

A

GND

Y

001aaf019

1

2

3

5

4

74AUP1G02

A

001aaf020

B

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

Fig 6.

Pin configuration SOT891, SOT1115 and

SOT1202

Fig 7.

Pin configuration SOT1226 (X2SON5)

74AUP1G02

A

001aaf021

B

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

B

GND

1

3

2

5

4

A

Y

aaa-002996

Transparent top view

74AUP1G02

Table 3.

Pin description

Symbol

Pin

Description

TSSOP5

XSON6

B

1

1

data input

A

2

2

data input

GND

3

3

ground (0 V)

Y

4

4

data output

n.c.

-

5

not connected

5

6

supply voltage