ALD500RAU-20QE datasheet(5/12 Pages) ALD

Part #	ALD500RAU-20QE

Description	PRECISION INTEGRATING ANALOG PROCESSOR WITH PRECISION VOLTAGE REFERENCE

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Manufacturer	ALD [Advanced Linear Devices]

Direct Link	http://www.aldinc.com

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ALD500RAU/ALD500RA/ALD500R

Advanced Linear Devices

5

DC & AC ELECTRICAL CHARACTERISTICS

TA = 25°C V supply = ±5.0V unless otherwise specified; CAZ = CREF = 0.47µf

500RAU

500RA

500R

Parameter

Symbol

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

Test Conditions

Supply Current

IS

0.6

1.0

0.6

1.0

0.6

1.0

mA

V

+ = 5V , A =1,B=1

Power Dissipation

PD

10

mW

V supply=

±5V

Positive Supply Range

V+S

4.5

5.5

4.5

5.5

4.5

5.5

V

Note 4

Negative Supply Range

V-S

-4.5

-5.5

-4.5

-5.5

-4.5

-5.5

V

Note 4

Comparator Logic 1,

VOH

44

4

V

ISOURCE = 400µA

Output High

Comparator Logic 0,

VOL

0.4

V

ISINK = 1.1mA

Output Low

Logic 1, Input High

VIH

3.5

V

Voltage

Logic 0, Input Low

VIL

11

1

V

Voltage

Logic Input Current

IL

0.01

µA

Comparator Delay

tD

11

1

µsec

Note 5

Figure 3. ALD500R TIMING DIAGRAM

66.667 msec.

123,093

Clock Pulses

Positive Input Signal

Negative Input Signal

66.667 msec.

0.5416

µs

123,093

Clock Pulses

COUT

B INPUT

A INPUT

1.8432 MHz Clock

1 Conversion Cycle

Auto Zero

Phase

Input Signal

Integration

Phase

Reference

Voltage

Deintegration

Phase

Integrator Zero

Phase

Auto Zero

Phase

Fixed number

of clock pulses

by design.

Variable

number of

clock pulses.

~

Clock data in

or clock data out

of counters within the

the microcontroller

or fixed logic controller,

as needed.

Fixed period of

approx.1 msec.

At VIN MAX,

max. number of

clock pulses

= 246,185

NOT VALID

Stop counter upon

detection of comparator

output going from high

to low state.

START DEINTEGRATION CYCLE

START INTEGRATION CYCLE

START

CONVERSION

CYCLE

START INTEGRATOR ZERO CYCLE

COUT

NOT VALID

REPEAT

CONVERSION

CYCLE

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