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ALD1721E Datasheet(PDF) 5 Page - Advanced Linear Devices |
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ALD1721E Datasheet(HTML) 5 Page - Advanced Linear Devices |
5 / 10 page ALD1721E/ALD1721 Advanced Linear Devices 5 TA = 25 oC VS = ±5.0V unless otherwise specified 1721E 1721 Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions Initial Power Supply PSRR i 83 83 dB RS ≤ 100KΩ Rejection Ratio 8 Initial Common Mode CMRRi 83 83 dB RS ≤ 100KΩ Rejection Ratio 8 Large Signal Voltage Gain AV 250 250 V/mV RL = 100KΩ Output Voltage Range VO low -4.98 -4.90 -4.98 -4.90 V RL = 100KΩ VO high 4.90 4.98 4.90 4.98 Bandwidth BW 1.0 1.0 MHz Slew Rate SR 1.0 1.0 V/ µsAV = +1, CL = 50pF VS = ±2.5V -55°C ≤ TA ≤ +125°C unless otherwise specified 1721E 1721 Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions Initial Input offset Voltage VOS i 0.5 0.8 mV RS ≤ 100KΩ Input Offset Current IOS 2.0 2.0 nA Input Bias Current IB 2.0 2.0 nA Initial Power Supply PSRR i 75 75 dB RS ≤ 100KΩ Rejection Ratio 8 Initial Common Mode CMRR i 83 83 dB RS ≤ 100KΩ Rejection Ratio 8 Large Signal Voltage Gain AV 15 50 15 50 V/mV RL = 100KΩ Output Voltage Range VO low -2.47 -2.40 -2.47 -2.40 V VO high 2.35 2.45 2.35 2.45 V RL = 100KΩ |
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