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AK4551 Datasheet(PDF) 3 Page - Asahi Kasei Microsystems |
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AK4551 Datasheet(HTML) 3 Page - Asahi Kasei Microsystems |
3 / 17 page ASAHI KASEI [AKD4551] <KM062000> ’00/3 - 3 - n Evaluation mode Applicable Evaluation Mode 1) Evaluation of loopback mode (default) 2) Evaluation of D/A using ideal sin wave generated by ROM data 3) Evaluation of D/A using A/D converted data 4) Evaluation of D/A using DIR (Optical Link) 5) Evaluation of A/D using D/A converted data 6) Evaluation of A/D using DIT (Optical Link) 7) All interface signals including master clock are fed externally. DIT PORT2 PORT1 DIR AKD53XX A/D Board ROM Board AKD43XX D/A Board PORT3 AKD4551 1) 2) 3) 4) 5) 6) CD Player 10pin-Header 1) Evaluation of loopback mode. (default) Nothing should be connected to PORT1/PORT3. In case of using external clock through a BNC connector (J5), select EXT on JP12 (XTI) and short JP10 (XTE).This mode corresponds to only JP13 (X_SCLK) 64fs. JP12 XTI JP14 DIR JP6 SCLK DIR ADC JP8 LRCK JP10 XTE JP13 X_SCLK DIR ADC OFF ON JP9 SDTI DIR ADC 64fs 32fs |
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