UCC2919

UCC3919

SLUS374C − JULY 1999 − REVISED NOVEMBER 2005

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APPLICATION INFORMATION

The UCC3919 monitors the voltage drop across a high side sense resistor and compares it against three

different voltage thresholds. These are discussed below. Figure 1 shows the UCC3919 waveforms under fault

conditions.

fault threshold

The first threshold is fixed at 50 mV. If the current is high enough such that the voltage on CSN is 50 mV below

external MOSFET will be turned off. It will either be latched off (until the power to the circuit is cycled, the L/R

depending on whether the L/R pin is set high or low by the user. The equation for this current threshold is simply:

I

FAULT +

0.05

R

SENSE

t

FAULT +

t

ON(sec) +

Ct(mF)

1.5

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In the retry mode, the timing capacitor will already be charged to 0.5 V at the end of the off time, so all subsequent

cycles will have a shorter ton time, given by:

t

FAULT ^

t

ON(sec) +

C

T

(

mF)

35

from 1.5 V to 0.5 V. The equation for the off time is therefore:

t

OFF(sec) +

C

Tm

F

1.2

shutdown characteristics

When the SD pin is set to TTL high (above 2 V) the UCC3919 is ensured to be enabled. When SD is set to a

low TTL (below 0.8 V) the UCC3919 is ensured to be disabled, but may not be in ultra low current sleep mode.

When SD is set to 0.2 V or less, the UCC3919 is ensured to be disabled and in ultra low current sleep mode.

See Figure 1. At cold temperatures, (below 0

°C), the UCC2919 shutdown supply current delays gradually over

time and may take >1 minute to drop below the 7-

µA shutdown current limit. However, the gate output is driven

low immediately when the SD pin is pulled low and does not exhibit a temperature dependency.

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