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ISO1050DWR Datasheet(PDF) 9 Page - Texas Instruments |
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ISO1050DWR Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 33 page  ISO1050 www.ti.com SLLS983H – JUNE 2009 – REVISED JUNE 2013 RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VIT+ Positive-going bus input threshold voltage 750 900 mV See Table 4 VIT– Negative-going bus input threshold voltage 500 650 mV Vhys Hysteresis voltage (VIT+ – VIT–) 150 mV IOH = –4 mA, See Figure 9 VCC – 0.8 4.6 VOH High-level output voltage with Vcc = 5V V IOH = –20 μA, See Figure 9 VCC – 0.1 5 IOL = 4 mA, See Figure 9 VCC – 0.8 3.1 VOH High-level output voltage with Vcc1 = 3.3V V IOL = 20 μA, See Figure 9 VCC – 0.1 3.3 IOL = 4 mA, See Figure 9 0.2 0.4 VOL Low-level output voltage V IOL = 20 μA, See Figure 9 0 0.1 CI Input capacitance to ground, (CANH or CANL) TXD at 3 V, VI = 0.4 sin (4E6πt) + 2.5V 6 pF CID Differential input capacitance TXD at 3 V, VI = 0.4 sin (4E6πt) 3 pF RID Differential input resistance TXD at 3 V 30 80 k Ω RIN Input resistance (CANH or CANL) TXD at 3 V 15 30 40 k Ω Input resistance matching RI(m) VCANH = VCANL –3% 0% 3% (1 – [RIN (CANH) / RIN (CANL)]) × 100% CMTI Common-mode transient immunity VI = VCC or 0 V, See Figure 16 25 50 kV/ μs (1) All typical values are at 25°C with VCC1 = VCC2 = 5V. RECEIVER SWITCHING CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high-level output 66 90 130 tPHL Propagation delay time, high-to-low-level output 51 80 105 TXD at 3 V, See Figure 9 ns tr Output signal rise time 3 6 tf Output signal fall time 3 6 tfs Failsafe output delay time from bus-side power loss VCC1 at 5 V, See Figure 15 6 μs Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: ISO1050 |
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