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AD644 Datasheet(PDF) 6 Page - Analog Devices |
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AD644 Datasheet(HTML) 6 Page - Analog Devices |
6 / 6 page AD644 REV. A –6– Figure 27a illustrates the 10-bit digital-to-analog converter, AD7533, connected for bipolar operation. Since the digital in- put can accept bipolar numbers and VREF can accept a bipolar analog input, the circuit can perform a 4-quadrant multiplying function. The photos exhibit the response to a step input at VREF. Figure 27b is the large signal response and Figure 27c is the small signal response. The output impedance of a CMOS DAC varies with the digital word thus changing the noise gain of the amplifier circuit. The effect will cause a nonlinearity the magnitude of which is depen- dent on the offset voltage of the amplifier. The AD644K with trimmed offset will minimize the effect. The Schottky protection diodes recommended for use with many older CMOS DACs are not required when using the AD644. ACTIVE FILTERS Literature on active filter techniques and characteristics based on operational amplifiers is readily available. The successful ap- plication of an active filter however, depends on the component selection to achieve the desired performance. The AD644 is rec- ommended for filters in medical, instrumentation, data acquisi- tion and audio applications, because of its high gain bandwidth figure, symmetrical slewing, low noise, and low 1 offset voltage. The state variable filter (Figure 28) is stable, easily tuned and is independent of circuit Q and gain. The use of the AD644 with its low input bias current simplifies the resistor (R3, R4) selec- tion for the passband center frequency, circuit Q and voltage gain. Figure 28. Band Pass State Variable Filter The sample and hold circuit, shown in Figure 29 is suitable for use with 8-bit A/D converters. The acquisition time using a 3900 pF capacitor and fast CMOS SPST (ADG200) switch is 15 µs. The droop rate is very low 25 × 10–9 V/µs due to the low input bias currents of the AD644. Care should be taken to minimize leakage paths. Leakages around the hold capacitor will increase the droop rate and degrade performance. Figure 29. Sample and Hold Circuit The AD644 in the circuit of Figure 30 provides highly accurate signal conditioning with high frequency input signals. It pro- vides an offset voltage drift of 10 µV/°C, CMRR of 80 dB over the range of dc to 10 kHz and a bandwidth of 200 kHz (–3 dB) at 1 V p-p output. The circuit of Figure 30 can be configured for a gain range of 2 to 1000 with a typical nonlinearity of 0.01% at a gain of 10. Figure 30. Wide Bandwidth Instrumentation Amplifier OUTLINE DIMENSIONS Dimensions shown in inches and (mm). |
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