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LPC11U36FBD48401 Datasheet(PDF) 10 Page - NXP Semiconductors

Part # LPC11U36FBD48401
Description  32-bit ARM Cortex-M0 microcontroller up to 128 kB flash up to 12 kB SRAM and 4 kB EEPROM USB device USART
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC11U36FBD48401 Datasheet(HTML) 10 Page - NXP Semiconductors

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LPC11U3X
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 25 November 2013
10 of 76
NXP Semiconductors
LPC11U3x
32-bit ARM Cortex-M0 microcontroller
6.2 Pin description
Table 3 shows all pins and their assigned digital or analog functions in order of the GPIO
port number. The default function after reset is listed first. All port pins have internal
pull-up resistors enabled after reset except for the true open-drain pins PIO0_4 and
PIO0_5.
Every port pin has a corresponding IOCON register for programming the digital or analog
function, the pull-up/pull-down configuration, the repeater, and the open-drain modes.
The USART, counter/timer, and SSP functions are available on more than one port pin.
Table 3.
Pin description
Symbol
Reset
state
[1]
Type
Description
RESET/PIO0_0
2
C1
3
4
[2]
I; PU
I
RESET — External reset input with 20 ns glitch filter.
A LOW-going pulse as short as 50 ns on this pin
resets the device, causing I/O ports and peripherals to
take on their default states and processor execution
to begin at address 0. This pin also serves as the
debug select input. LOW level selects the JTAG
boundary scan. HIGH level selects the ARM SWD
debug mode.
-
I/O
PIO0_0 — General purpose digital input/output pin.
PIO0_1/CLKOUT/
CT32B0_MAT2/
USB_FTOGGLE
3C2
4
5
[3]
I; PU
I/O
PIO0_1 — General purpose digital input/output pin. A
LOW level on this pin during reset starts the ISP
command handler or the USB device enumeration.
-O
CLKOUT — Clockout pin.
-O
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
-O
USB_FTOGGLE — USB 1 ms Start-of-Frame signal.
PIO0_2/SSEL0/
CT16B0_CAP0/IOH_0
8F1
10
13
[3]
I; PU
I/O
PIO0_2 — General purpose digital input/output pin.
-
I/O
SSEL0 — Slave select for SSP0.
-I
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
-
I/O
IOH_0 — I/O Handler input/output 0.
LPC11U37HFBD64/401 only.
PIO0_3/USB_VBUS/
IOH_1
9H2
14
19
[3]
I; PU
I/O
PIO0_3 — General purpose digital input/output pin. A
LOW level on this pin during reset starts the ISP
command handler. A HIGH level during reset starts
the USB device enumeration.
-I
USB_VBUS — Monitors the presence of USB bus
power.
-
I/O
IOH_1 — I/O Handler input/output 1.
LPC11U37HFBD64/401 only.


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