TMC1203

PRODUCT SPECIFICATION

2

Circuit Function

Within the TMC1203 are three 8-bit A/D converters, each

employing two-step architecture to convert an analog input

to a digital output at rates up to 50 Msps. Input signals are

held in integral track/hold stages during the conversion pro-

cess. Operation is pipelined, with one input sample taken and

Each of the three converters function identically. In the fol-

lowing descriptions ‘X’ refers to a generic input/output or

clock where ‘X’ is equivalent to A, B or C.

The first step in the conversion process is a coarse 4-bit

quantization. This determines the range of the subsequent

fine 4-bit quantization step. To eliminate spurious codes, the

fine 4-bit A/D quantizer output is gray-coded and converted

to binary before it is combined with the coarse result to form

a complete 8-bit result.

Analog Input and Voltage References

digital data. Input signals outside this range produce “satu-

rated” 00h or FFh output codes. The device will not

Input range is very flexible and extends from the +5 Volt

power supply to ground. Nominal input range is 2 Volts,

extending from 0.6V to 2.6V. Characterization and

performance is specified over this range. However, the

part will function with a full-scale range from 1.0V to 5.0V.

A smaller input range may simplify analog signal condition-

ing circuitry, at the expense of additional noise sensitivity

and some reduced differential linearity performance.

verter is a reference resistor ladder comprising 255 resistors

offset errors are directly related to the accuracy and stability

of the applied reference voltages.

Because a two-step conversion process is employed, it is

important that the references remain stable during the

ENTIRE conversion process (two clock cycles). The refer-

ence voltage can then be changed, but any conversion in

progress during a reference change is invalid.

Digital Inputs and Outputs

Sampling of the applied input signal occurs on the "falling"

(Output Hold Time), satisfying any hold time requirement of

Whenever the analog input signal is sampled and found to be

at a level beyond the A/D conversion range, the output limits

at 00h or FFh, as appropriate.

Table 1. A/D Output Coding

The outputs of the TMC1203 are CMOS- and

TTL-compatible, and are capable of driving four low-power

the A/D outputs in a high-impedance state when HIGH.

Power and Ground

The TMC1203 operates from a single +5 Volt power supply.

analog ground plane.

Input Voltage

Output

FF

FF

FE

• • •

• • •

80

7F

• • •

• • •

01

00

00