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MPC8323ECZQAFDCA Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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MPC8323ECZQAFDCA Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 82 page MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4 4 Freescale Semiconductor Overview 1.1.2 Serial Interfaces The MPC8323E serial interfaces are as follows: • Support for one UL2 interface with 31 multi-PHY addresses (MPC8323E and MPC8323 only) • Support for up to three 10/100 Mbps Ethernet interfaces using MII or RMII • Support for up to four T1/E1/J1/E3 or DS-3 serial interfaces (TDM) • Support for dual UART and SPI interfaces and a single I2C interface 1.2 QUICC Engine Block The QUICC Engine block is a versatile communications complex that integrates several communications peripheral controllers. It provides on-chip system design for a variety of applications, particularly in communications and networking systems. The QUICC Engine block has the following features: • One 32-bit RISC controller for flexible support of the communications peripherals • Serial DMA channel for receive and transmit on all serial channels • Five universal communication controllers (UCCs) supporting the following protocols and interfaces (not all of them simultaneously): — 10/100 Mbps Ethernet/IEEE 802.3® standard — IP support for IPv4 and IPv6 packets including TOS, TTL, and header checksum processing — ATM protocol through UTOPIA interface (note that the MPC8321 and MPC8321E do not support the UTOPIA interface) — HDLC /transparent up to 70-Mbps full-duplex — HDLC bus up to 10 Mbps — Asynchronous HDLC — UART — BISYNC up to 2 Mbps — QUICC multi-channel controller (QMC) for 64 TDM channels • One UTOPIA interface (UPC1) supporting 31 multi-PHYs (MPC8323E- and MPC8323-specific) • Two serial peripheral interfaces (SPI). SPI2 is dedicated to Ethernet PHY management. • Four TDM interfaces • Thirteen independent baud rate generators and 19 input clock pins for supplying clocks to UCC serial channels • Four independent 16-bit timers that can be interconnected as two 32-bit timers The UCCs are similar to the PowerQUICC II peripherals: SCC (BISYNC, UART, and HDLC bus) and FCC (fast Ethernet, HDLC, transparent, and ATM). |
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