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LTC4055 Datasheet(PDF) 5 Page - Linear Technology |
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LTC4055 Datasheet(HTML) 5 Page - Linear Technology |
5 / 12 page LTC4416/LTC4416-1 4416fa PI FU CTIO S H1 (Pin 1): Open-Drain Comparator Output of the E1 Pin. If E1 > VREF, the H1 pin will go high impedance, otherwise the pin will be grounded. The maximum voltage permitted on this pin is 7V. This pin provides support for setting up hysterisis to an external resistor network. E1 (Pin 2): LTC4416 Comparator Enable Input. A high signal greater than VREF will enable the V1 path. The ideal diode action will then determine if the V1 path should turn on by controlling any PFET(s) connected to the G1 pin. If the E1 signal is driven low, the V1 path will perform a “soft-off” provided the PFET(s) are properly configured for blocking DC current. An internal current sink will pull the E1 pin down when the E1 input exceeds 1.5V. E1 (Pin 2): LTC4416-1 Comparator Enable Input. A high signal greater than VREF will enable the V1 path. The ideal diode action will then determine if the V1 path should turn on by controlling any PFET(s) connected to the G1 pin. If the E1 signal is driven low, the V1 path will be quickly disabled by enabling the “fast-off” feature, pulling the G1 gate high. An internal current sink will pull the E1 pin down when the E1 input exceeds 1.5V. GND (Pin 3): Ground. This pin provides a power return path for all the internal circuits. E2 (Pin 4): LTC4416 Comparator Enable Input. A low signal less than VREF will enable the V2 path. The ideal diode action will then determine if the V2 path should turn on by controlling any PFET(s) connected to the G2 pin. If the E2 signal is driven high, the V2 path will perform a “soft-off” provided the PFET(s) are properly configured for blocking DC current. An internal current sink will pull the E2 pin down when the E2 input exceeds 1.5V. E2 (Pin 4): LTC4416-1 Comparator Enable Input. A low signal less than VREF will enable the V2 path. The ideal diode action will then determine if the V2 path should turn on by controlling any PFET(s) connected to the G2 pin. If the E2 signal is driven high, the V2 path will be quickly disabled by enabling the “fast-off” feature, pulling the G2 gate high. An internal current sink will pull the E2 pin down when the E2 input exceeds 1.5V. H2 (Pin 5): Open-Drain Comparator Output of the E2 Pin. If E2 > VREF, the H2 pin will go high impedance, otherwise the pin will be grounded. The maximum voltage permitted on this pin is 7V. This pin provides support for setting up hysterisis to an external resistor network. G2 (Pin 6): Second P-Channel MOSFET Power Switch Gate Drive Pin. This pin is directed by the second power controller to maintain a forward regulation voltage (VFR) of 25mV between the V2 and VS pins when V2 is greater than VS. When V2 is less than VS, the G2 pin will pull up to the VS pin voltage, turning off the second P-channel power switch. V2 (Pin 7): Second Input Supply Voltage. Supplies power to the second power controller and the band-gap refer- ence. V2 is one of the two voltage sense inputs to the second internal power controller (the other input to the second internal power controller is the VS pin). This input is usually supplied power from the second, or backup, power source. This pin can be bypassed to ground with a capacitor in the range of 0.1µF to 10µF if needed to suppress load transients. VS (Pin 8): Power Sense Input Pin. Supplies power to the internal circuitry of both the first and second power controller and the band-gap reference. This pin is also a voltage sense input to both internal analog controllers (the other input to the first controller is the V1 pin and the other input to the second controller is the V2 pin.) This input may also be supplied power from an auxiliary source which also supplies current to the load. V1 (Pin 9): First Input Supply Voltage. Supplies power to the first power controller and the band-gap reference. V1 is one of the two voltage sense inputs to the first internal power controller (the other input to the first internal power controller is the VS pin). This input is usually supplied power from the first, or primary, power source. This pin can be bypassed to ground with a capacitor in the range of 0.1µF to 10µF if needed to suppress load transients. G1 (Pin 10): First P-Channel MOSFET Power Switch Gate Drive Pin. This pin is directed by the first power controller to maintain a forward regulation voltage (VFR) of 25mV between the V1 and VS pins when V1 is greater than VS. When V1 is less than VS,theG1pinwillpulluptotheVSpin voltage, turning off the first P-channel power switch. |
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Similar Description - LTC4055 |
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