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LTC4059 Datasheet(PDF) 9 Page - Linear Technology |
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LTC4059 Datasheet(HTML) 9 Page - Linear Technology |
9 / 24 page LTC4085 9 4085fd WALL (Pin 7): Wall Adapter Present Input. Pulling this pin above 4.25V will disconnect the power path from IN to OUT. The ACPR pin will also be pulled low to indicate that a wall adapter has been detected. NTC (Pin 8): Input to the NTC Thermistor Monitoring Circuits. Under normal operation, tie a thermistor from the NTC pin to ground and a resistor of equal value from NTC to VNTC. When the voltage on this pin is above 0.74 • VVNTC (Cold, 0°C) or below 0.29 • VVNTC (Hot, 50°C) the timer is suspended, but not cleared, the charging is disabled and the CHRG pin remains in its former state. When the voltage on NTC comes back between 0.74 • VVNTC and 0.29 • VVNTC, the timer continues where it left off and charging is re-enabled if the battery voltage is below the recharge threshold. There is approximately 3°C of temperature hysteresis associated with each of the input comparators. Connect the NTC pin to ground to disable this feature. This will disable all of the LTC4085 NTC functions. VNTC (Pin 9): Output Bias Voltage for NTC. A resistor from this pin to the NTC pin will bias the NTC thermistor. ACPR (Pin 10): Wall Adapter Present Output. Active low open-drain output pin. A low on this pin indicates that the wall adapter input comparator has had its input pulled above the input threshold. This feature is disabled if no power is present on IN or OUT or BAT (i.e., below UVLO thresholds). CHRG (Pin 11): Open-Drain Charge Status Output. When the battery is being charged, the CHRG pin is pulled low by an internal N-channel MOSFET. When the timer runs out or the charge current drops below 10% of the programmed charge current (while in voltage mode) or the input supply or output supply is removed, the CHRG pin is forced to a high impedance state. PROG (Pin 12): Charge Current Program. Connecting a resistor, RPROG, to ground programs the battery charge current. The battery charge current is programmed as follows: ICHG(A) = 50,000V RPROG GATE (Pin 13): External Ideal Diode Gate Pin. This pin can be used to drive the gate of an optional external PFET connected between BAT and OUT. By doing so, the impedance of the ideal diode between BAT and OUT can be reduced. When not in use, this pin should be left floating. It is important to maintain a high impedance on this pin and minimize all leakage paths. BAT (Pin 14): Connect to a single cell Li-Ion battery. This pin is used as an output when charging the battery and as an input when supplying power to OUT. When the OUT pin potential drops below the BAT pin potential, an ideal diode function connects BAT to OUT and prevents VOUT from dropping significantly below VBAT.Aprecisioninternal resistor divider sets the final float (charging) potential on this pin. The internal resistor divider is disconnected when IN and OUT are in undervoltage lockout. Exposed Pad (Pin 15): Ground. The exposed package pad is ground and must be soldered to the PC board for proper functionality and for maximum heat transfer. PIN FUNCTIONS |
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