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SPT7935SIT Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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SPT7935SIT Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 8 page 2 7/12/00 SPT7935 ELECTRICAL SPECIFICATIONS TA=TMIN–TMAX , VDD 1=VDD2=VDD3=3.3 V, VREF–=1.0 V, VREF+=2.0 V, Common Mode Voltage=1.65 V, ƒCLK=20 MSPS, Bias 1=90 µA, Bias 2=9.5 µA, Differential Input, Duty Cycle=50%, unless otherwise specified. TEST TEST SPT7935 PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS DC Accuracy Resolution 12 Bits Differential Linearity V ±0.6 LSB Integral Linearity V ±3.0 LSB No Missing Codes VI Guaranteed Analog Input Input Voltage Range (Differential) IV ±0.6 ±1.0 ±1.7 V Common Mode Input Voltage IV 1.2 1.65 1.9 V Input Capacitance V 1.4 pF Input Bandwidth (Large Signal) V 120 MHz Offset (Mid-scale) VIN+=VIN–=VCM V ±1.0 % FSR Gain Error V 0.3 % FSR Reference Voltages Reference Input Voltage Range IV 0.6 1.0 1.7 V (VREF+ – VREF–) Negative Reference Voltage (VREF–) IV 0.9 1.0 1.3 V Positive Reference Voltage (VREF+) IV 1.9 2.0 2.6 V Common Mode Output Voltage (VCM)IO = –1 µA VI 1.3 1.65 1.8 V VREF+ Current V 35 µA VREF– Current V –25 µA Switching Performance Maximum Conversion Rate VI 20 MHz Pipeline Delay IV 7.5 Clocks (See Timing Diagram) Aperture Delay Time (TAP)V 5 ns Aperture Jitter Time V 10 ps-rms Dynamic Performance Effective Number of Bits ƒIN = 5.0 MHz VI 9.2 9.8 Bits ƒIN = 10.0 MHz V 9.0 Bits Signal-To-Noise Ratio ƒIN = 5.0 MHz VI 59 62 dB ƒIN = 10.0 MHz V 58 dB Total Harmonic Distortion ƒIN = 5.0 MHz VI –68 –61 dB ƒIN = 10.0 MHz V –60 dB ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C Supply Voltages VDD1 .................................................................... –0.5 V to +6 V VDD2 .................................................................... –0.5 V to +6 V VDD3 .................................................................... –0.5 V to +6 V Input Voltages Analog Input ................................. –0.5 V to (VDD +0.5 V) Digital Input .................................. –0.5 V to (VDD +0.5 V) VREF+ .......................................... –0.5 V to (VDD +0.5 V) VREF– .......................................... –0.5 V to (VDD +0.5 V) CLK .............................................. –0.5 V to (VDD +0.5 V) Temperature Operating Temperature ............................. –40 to +85 °C Storage Temperature ............................... –65 to +125 °C Note: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal applied conditions in typical applications. |
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