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BQ4802YDWG4 Datasheet(PDF) 6 Page - Texas Instruments |
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BQ4802YDWG4 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 26 page bq4802Y bq4802LY SLUS464C – AUGUST 2000 – REVISED JUNE 2002 www.ti.com 6 Terminal Functions (Continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION WDI 23 I WDIis a three-level input. If WDI remains either high or low for longer than the watchdog time-out period (1.5-s default), WDO goes low. WDO remains low until the next transition at WDI. Leaving WDI unconnected disables the watchdog function. WDI connects to an internal voltage divider between VOUT and VSS, which sets it to mid-supply when left unconnected. WDO 4 WDO goes low if WDI remains either high or low longer than the watchdog time-out period. WDO returns high on the next transition at WDI. WDO remains high if WDI is unconnected. WE 27 WE provides the write control for the RTC memory locations. X1 2(1) Crystal connection X2 3(1) y FUNCTIONAL BLOCK DIAGRAM Figure 3 is a block diagram of the bq4802Y/bq4802LY. The following sections describe the bq4802Y/bq4802LY functional operation including clock interface, data-retention modes, power-on reset timing, watchdog timer activation, and interrupt generation. Figure 3. Block Diagram Time- Base Oscillator X1 X2 ÷8 ÷64 ÷64 16:1 MUX 4 Control/Status Registers Clock/Calendar Update Interrupt Generator INT Watchdog Transition Detector WDO Power-Fail Control, Battery Switchover and Reset Circuits VOUT RST CEOUT VCC BC CEIN WDI Clock/Calendarand Alarm Registers User Buffer (16 Bytes) µP Bus Interface CS OE WE A0 – A3 DQ0 – DQ7 |
Similar Part No. - BQ4802YDWG4 |
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Similar Description - BQ4802YDWG4 |
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