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UDA1345TSDB-T Datasheet(PDF) 9 Page - NXP Semiconductors |
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UDA1345TSDB-T Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 29 page 2002 May 28 9 NXP Semiconductors Product specification Economy audio CODEC UDA1345TS Table 2 Digital decimation filter characteristics Note: the digital output level is inversely proportional to the ADC analog power supply. This means that with a constant analog input level and increasing power supply the digital output level will decrease proportionally. 7.4 Interpolation filter (DAC) The digital filter interpolates from 1 to 128fs by means of a cascade of a recursive filter and an FIR filter. Table 3 Digital interpolation filter characteristics 7.5 Double speed Since the device supports a sampling range of 8 to 100 kHz, the device can support double speed (e.g. for 44.1 kHz and 48 kHz sampling frequency) by just doubling the system speed. In double speed all features are available. 7.6 Noise shaper (DAC) The 3rd-order noise shaper operates at 128fs. It shifts in-band quantization noise to frequencies well above the audio band. This noise shaping technique enables high signal-to-noise ratios to be achieved. The noise shaper output is converted into an analog signal using a filter stream digital-to-analog converter. 7.7 The Filter Stream DAC (FSDAC) The FSDAC is a semi-digital reconstruction filter that converts the 1-bit data stream of the noise shaper to an analog output voltage. The filter coefficients are implemented as current sources and are summed at virtual ground of the output operational amplifier. In this way very high signal-to-noise performance and low clock jitter sensitivity is achieved. A post filter is not needed due to the inherent filter function of the DAC. On-board amplifiers convert the FSDAC output current to an output voltage signal capable of driving a line output. The output voltage of the FSDAC is scaled proportionally with the power supply voltage. 7.8 Power control In the event that the DAC is powered-up or powered-down, a cosine roll-off mute will be performed (when powering down) or a cosine roll-up de-mute (when powering up) will be performed. This is in order to prevent clicks when powering up or down. This power-on/off mute takes 32 × 4=128samples. 7.9 L3MODE or static pin control The UDA1345TS can be used under L3 microcontroller interface mode or under static pin control. The mode can be set via the Mode Control (MC) pins MC1 (pin 8) and MC2 (pin 21). The function of these pins is given in Table 4. Table 4 Mode Control pins MC1 and MC2 Important: in L3MODE the UDA1345TS is completely pin and function compatible with the UDA1340M and the UDA1344TS. Note: the UDA1345TS does NOT support bass-boost and treble. ITEM CONDITIONS VALUE (dB) Pass-band ripple 0 − 0.45f s ±0.05 Stop band >0.55fs −60 Dynamic range 0 − 0.45f s 114 Overall gain when a 0 dB signal is input to ADC to digital output DC −1.16 ITEM CONDITIONS VALUE (dB) Passband ripple 0 − 0.45f s ±0.03 Stopband >0.55fs −65 Dynamic range 0 − 0.45f s 116.5 Gain DC −3.5 MODE MC2 MC1 L3MODE LOW LOW Test modes LOW HIGH HIGH LOW Static pin mode HIGH HIGH |
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