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SI4450DY Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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SI4450DY Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 5 page 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , TIME (sec) 1 Single Pulse D = 0.5 0.1 0.05 0.02 0.01 0.2 Duty Cycle, D = t /t 1 2 R (t) = r(t) * R R = 125°C/W θJA θJA θJA T - T = P * R (t) θJA A J P(pk) t1 t 2 0 2 4 6 8 10 0 7 14 21 28 35 Qg, GATE CHARGE (nC) ID=8.0A VDS= 12V 24V 48V 0 500 1000 1500 2000 2500 0 6 12 18 24 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Ciss Coss Crss 0.01 0.1 1 10 100 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) RDS(ON) Limit DC 10s 1s 100ms 10ms 1ms 100 µs 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 SINGLE PULSE TIME (SEC) SINGLE PULSE RθJA=125 oC/W T =25 oC Si4450DY Rev A Figure 7. Gate Charge Characteristics. Typical Characteristics (continued) Figure 8. Capacitance Characteristics. Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. Figure 11. Transient Thermal Response Curve. Thermal Characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. |
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