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74HC75DB Datasheet(PDF) 11 Page - NXP Semiconductors |
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74HC75DB Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 9397 750 13816 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 11 of 20 Philips Semiconductors 74HC75 Quad bistable transparant latch [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nD to nQ see Figure 6 VCC = 2.0 V - - 165 ns VCC = 4.5 V - - 33 ns VCC = 6.0 V - - 28 ns propagation delay nD to nQ see Figure 7 VCC = 2.0 V - - 180 ns VCC = 4.5 V - - 36 ns VCC = 6.0 V - - 31 ns propagation delay LEnn to nQ see Figure 9 VCC = 2.0 V - - 180 ns VCC = 4.5 V - - 36 ns VCC = 6.0 V - - 31 ns propagation delay LEnn to nQ see Figure 9 VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns VCC = 6.0 V - - 32 ns tTHL, tTLH output transition time see Figure 6 and 7 VCC = 2.0 V - - 110 ns VCC = 4.5 V - - 22 ns VCC = 6.0 V - - 19 ns tW enable pulse width HIGH see Figure 9 VCC = 2.0 V 120 - - ns VCC = 4.5 V 24 - - ns VCC = 6.0 V 20 - - ns tsu set-up time nD to LEnn see Figure 8 VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns th hold time nD to LEnn see Figure 8 VCC = 2.0 V 3 - - ns VCC = 4.5 V 3 - - ns VCC = 6.0 V 3 - - ns Table 8: Dynamic characteristics …continued GND = 0 V; tr =tf = 6 ns; CL = 50 pF; unless otherwise specified, see Figure 10. Symbol Parameter Conditions Min Typ Max Unit |
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