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CAT6219-125TDGT3 Datasheet(PDF) 2 Page - ON Semiconductor

Part # CAT6219-125TDGT3
Description  500 mA CMOS LDO Regulator
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CAT6219-125TDGT3 Datasheet(HTML) 2 Page - ON Semiconductor

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Figure 1. Typical Application Circuit
VIN
BYP
EN
VOUT
GND
OFF ON
1 mF
2.3 V
to 5.5 V
2.2 mF
10 nF
CAT6219
Figure 2. Adjustable Output LDO
CIN
VIN
VOUT
COUT
CBYP (Optional)
VIN
CAT6219
ADJ
EN
VOUT
GND
OFF ON
1 mF
2.3 V
to 5.5 V
2.2 mF
R1
R2
COUT
VOUT
VIN
CIN
VOUT + 1.24 V 1 )
R1
R2
Table 1. PIN DESCRIPTIONS
Name
Function
VIN
Supply voltage input.
GND
Ground reference.
EN
Enable input (active high); a 2.5 MW pull−down
resistor is provided.
BYP
Optional bypass capacitor connection for noise
reduction and PSRR enhancing.
ADJ
Adjustable input. Feedback pin connected to
resistor divider.
VOUT
LDO Output Voltage.
TAB
To be connected to the ground plane on PCB
Pin Function
VIN is the supply pin for the LDO. A small 1
mF ceramic
bypass capacitor is required between the VIN pin and ground
near the device. When using longer connections to the power
supply, CIN value can be increased without limit. The
operating input voltage range is from 2.3 V to 5.5 V.
EN is the enable control logic (active high) for the regulator
output. It has a 2.5 M
W pull−down resistor, which assures
that if EN pin is left open, the circuit is disabled.
VOUT is the LDO regulator output. A small 2.2
mF ceramic
bypass capacitor is required between the VOUT pin and
ground. For better transient response, its value can be
increased to 4.7
mF.
The capacitor should be located near the device. For the
SOT23-5 package, a continuous 500 mA output current may
turn-on the thermal protection. A 250
W internal shutdown
switch discharges the output capacitor in the no-load
condition.
GND is the ground reference for the LDO. The pin must be
connected to the ground plane on the PCB.
BYP is the reference bypass pin. An optional 0.01
mF
capacitor can be connected between BYP pin and GND to
reduce the output noise and enhance the PSRR at high
frequency.
ADJ is the adjustable input pin for the adjustable LDO. The
pin is connected to the resistor voltage divider.
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Unit
VIN
0 to 6.5
V
VEN, VOUT
−0.3 to VIN + 0.3
V
Junction Temperature, TJ
+150
_C
Power Dissipation, PD
Internally Limited (Note 1)
mW
Storage Temperature Range, TS
−65 to +150
_C
Lead Temperature (soldering, 5 sec.)
260
_C
ESD Rating (Human Body Model)
3
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RECOMMENDED OPERATING CONDITIONS (Note 2)
Parameter
Range
Unit
VIN
2.3 to 5.5
V
VEN
0 to VIN
V
Junction Temperature Range, TJ
−40 to +125
_C
Package Thermal Resistance, θJA SOT23−5
Package Thermal Resistance, θJA TDFN−6
235
206
_C/W
NOTE: Typical application circuit with external components is shown above.
1. The maximum allowable power dissipation at any TA (ambient temperature) is PDmax = (TJmax − TA)/qJA. Exceeding the maximum allowable
power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
2. The device is not guaranteed to work outside its operating rating.


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