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CAT93C66YI-GT3 Datasheet(PDF) 4 Page - ON Semiconductor |
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CAT93C66YI-GT3 Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 16 page CAT93C66, CAT93W66 http://onsemi.com 4 Table 9. A.C. CHARACTERISTICS − MATURE PRODUCT (VCC = +1.8 V to +5.5 V, TA = −40°C to +125°C, unless otherwise specified.) (Note 8) Symbol Parameter Limits Units Min Max tCSS CS Setup Time 50 ns tCSH CS Hold Time 0 ns tDIS DI Setup Time 100 ns tDIH DI Hold Time 100 ns tPD1 Output Delay to 1 0.25 ms tPD0 Output Delay to 0 0.25 ms tHZ (Note 9) Output Delay to High−Z 100 ns tEW Program/Erase Pulse Width 5 ms tCSMIN Minimum CS Low Time 0.25 ms tSKHI Minimum SK High Time 0.25 ms tSKLOW Minimum SK Low Time 0.25 ms tSV Output Delay to Status Valid 0.25 ms SKMAX Maximum Clock Frequency DC 2000 kHz 8. Test conditions according to “A.C. Test Conditions” table. 9. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. Table 10. A.C. CHARACTERISTICS − NEW PRODUCT (Rev H) (VCC = +1.8 V to +5.5 V, TA = −40°C to +125°C, unless otherwise specified.) Symbol Parameter VCC = 1.8 V − 5.5 V VCC = 4.5 V − 5.5 V Units Min Max Min Max tCSS CS Setup Time 50 50 ns tCSH CS Hold Time 0 0 ns tDIS DI Setup Time 100 50 ns tDIH DI Hold Time 100 50 ns tPD1 Output Delay to 1 0.25 0.1 ms tPD0 Output Delay to 0 0.25 0.1 ms tHZ (Note 10) Output Delay to High−Z 100 100 ns tEW Program/Erase Pulse Width 5 5 ms tCSMIN Minimum CS Low Time 0.25 0.1 ms tSKHI Minimum SK High Time 0.25 0.1 ms tSKLOW Minimum SK Low Time 0.25 0.1 ms tSV Output Delay to Status Valid 0.25 0.1 ms SKMAX Maximum Clock Frequency DC 2000 DC 4000 kHz 10.This parameter is tested initially and after a design or process change that affects the parameter. |
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