AT45DB081E-SSHN-Y datasheet(6/69 Pages) ETC2

Part #	AT45DB081E-SSHN-Y

Description	8-Mbit DataFlash (with Extra 256-Kbits), 1.65V Minimum SPI Serial Flash Memory

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AT45DB081E [PRELIMINARY DATASHEET]

DS-45DB081E-028C–DFLASH–10/2013

4.

Device Operation

The device operation is controlled by instructions from the host processor. The list of instructions and their associated

opcodes are contained in Table 15-1 on page 40 through Table 15-4 on page 41. A valid instruction starts with the falling

edge of CS followed by the appropriate 8-bit opcode and the desired buffer or main memory address location. While the

CS pin is low, toggling the SCK pin controls the loading of the opcode and the desired buffer or main memory address

location through the SI (Serial Input) pin. All instructions, addresses, and data are transferred with the Most Significant

Bit (MSB) first.

Three address bytes are used to address memory locations in either the main memory array or in one of the SRAM

buffers. The three address bytes will be comprised of a number of dummy bits and a number of actual device address

bits, with the number of dummy bits varying depending on the operation being performed and the selected device page

size. Buffer addressing for the standard DataFlash page size (264 bytes) is referenced in the datasheet using the

terminology BFA8 - BFA0 to denote the 9 address bits required to designate a byte address within a buffer. The main

memory addressing is referenced using the terminology PA11 - PA0 and BA8 - BA0, where PA11 - PA0 denotes the

12 address bits required to designate a page address, and BA8 - BA0 denotes the 9 address bits required to designate a

byte address within the page. Therefore, when using the standard DataFlash page size, a total of 21 address bits are

used.

For the “power of 2” binary page size (256 bytes), the buffer addressing is referenced in the datasheet using the

conventional terminology BFA7 - BFA0 to denote the 8 address bits required to designate a byte address within a buffer.

Main memory addressing is referenced using the terminology A19 - A0, where A19 - A8 denotes the 12 address bits

required to designate a page address, and A7 - A0 denotes the 8 address bits required to designate a byte address

within a page. Therefore, when using the binary page size, a total of 20 address bits are used.

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