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DS125BR401 Datasheet(PDF) 11 Page - Texas Instruments |
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DS125BR401 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 52 page  DS125BR401 www.ti.com SNLS419C – JULY 2012 – REVISED APRIL 2013 FUNCTIONAL DESCRIPTION The DS125BR401 compensates for lossy FR-4 printed circuit board backplanes and balanced cables. The DS125BR401 operates in 3 modes: Pin Control Mode (ENSMB = 0), SMBus Slave Mode (ENSMB = 1) and SMBus Master Mode (ENSMB = float) to load register informations from external EEPROM; please refer to SMBUS Master Mode for additional information. Pin Control Mode: When in pin mode (ENSMB = 0), equalization and de-emphasis can be selected via pin for each side independently. When de-emphasis is asserted VOD is automatically adjusted per Table 3. For PCIe applications, the RXDET pins provides automatic and manual control for input termination (50 Ω or >50KΩ). MODE setting is also pin controllable with pin selections (Gen 1/2, auto detect and PCIe Gen 3). The receiver electrical idle detect threshold is also adjustable via the SD_TH pin. SMBUS Mode: When in SMBus mode (ENSMB = 1), the VOD (output amplitude), equalization, de-emphasis, and termination disable features are all programmable on a individual lane basis, instead of grouped by A or B as in the pin mode case. Upon assertion of ENSMB, the EQx and DEMx functions revert to register control immediately. The EQx and DEMx pins are converted to AD0-AD3 SMBus address inputs. The other external control pins (MODE, RXDET and SD_TH) remain active unless their respective registers are written to and the appropriate override bit is set, in which case they are ignored until ENSMB is driven low (pin mode). On power-up and when ENSMB is driven low all registers are reset to their default state. If PWDN is asserted while ENSMB is high, the registers retain their current state. Equalization settings accessible via the pin controls were chosen to meet the needs of most high speed applications. If additional fine tuning or adjustment is needed, additional equalization settings can be accessed via the SMBus registers. Each input has a total of 256 possible equalization settings. The tables show the 16 setting when the device is in pin mode. When using SMBus mode, the equalization, VOD and de- Emphasis levels are set by registers. The 4-level input pins utilize a resistor divider to help set the 4 valid levels and provide a wider range of control settings when ENSMB=0. There is an internal 30K pull-up and a 60K pull-down connected to the package pin. These resistors, together with the external resistor connection combine to achieve the desired voltage level. Using the 1K pull-up, 1K pull-down, no connect, and 20K pull-down provide the optimal voltage levels for each of the four input states. Table 1. 4–Level Control Pin Settings Level Setting 3.3V Mode 2.5V Mode 0 Tie 1k Ω to GND 0.10 V 0.08 V R Tie 20k Ω to GND 1/3 x VIN 1/3 x VDD Float Float (leave pin open) 2/3 x VIN 2/3 x VDD 1 Tie 1k Ω to VIN or VDD VIN - 0.05 V VDD - 0.04 V Typical 4-Level Input Thresholds • Level 1 - 2 = 0.2 * VIN or VDD • Level 2 - 3 = 0.5 * VIN or VDD • Level 3 - 4 = 0.8 * VIN or VDD In order to minimize the startup current associated with the integrated 2.5V regulator the 1K pull-up / pull-down resistors are recommended. If several 4 level inputs require the same setting, it is possible to combine two or more 1K resistors into a single lower value resistor. As an example; combining two inputs with a single 500 Ohm resistor is a good way to save board space. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: DS125BR401 |
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