Current Cycle

Previous Cycle

Next Cycle

Input Transmit Clock

A0

A1

A2

A3

B0

B1

B2

B3

C0

C1

C2

C3

D0

D1

D2

D3

E0

E1

E2

E3

LVDS Data-0

LVDS Data-1

LVDS Data-2

LVDS Data-3

LVDS Data-4

Serialized CML Output

First Bit Out

Last Bit Out

DS32EL0421, DS32ELX0421

www.ti.com

SNLS282F – MAY 2008 – REVISED APRIL 2013

Figure 6. 5-Bit Parallel LVDS Inputs Mapped to CML Output

FUNCTIONAL DESCRIPTION

POWER SUPPLIES

The DS32EL0421 and DS32ELX0421 have several power supply pins, at 2.5V as well as 3.3V. It is important

that these pins all be connected and properly bypassed. Bypassing should consist of parallel 4.7

μF and 0.1μF

capacitors as a minimum, with a 0.1

μF capacitor on each power pin. A 22 μF capacitor is required on the

VDDPLL pin which is connected to the 3.3V rail.

These devices have a large contact in the center on the bottom of the package. This contact must be connected

to the system GND as it is the major ground connection for the device.

POWER UP

It is recommended, although not necessary, to bring up the 3.3V power supply before the 2.5V supply. If the 2.5V

supply is powered up first, an initial current draw of approximately 600mA from the 2.5V rail may occur before

settling to its final value. Regardless of the sequence, both power rails should monotonically ramp up to their final

values.

POWER MANAGEMENT

These devices have two methods to reduce power consumption. To enter the first power save mode, the on

board host FPGA or controlling device can cease to output the DDR transmit clock. To further reduce power

consumption, write 40'h to register 26'h and 10'h to register 01'h. This will put the device in its lowest power

consumption mode.

RESET

There are three ways to reset these devices. A reset occurs automatically during power-up. The device can also

be reset by pulling the RESET pin low, with normal operation resuming when the pin is driven high again. The

device can also be reset by writing to the reset register. This reset will put all of the register values back to their

default values, except it will not affect the address register value if the SMBus default address has been

changed.

Copyright © 2008–2013, Texas Instruments Incorporated

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Product Folder Links: DS32EL0421 DS32ELX0421