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MSP430F6748IPZR Datasheet(PDF) 11 Page - Texas Instruments |
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MSP430F6748IPZR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 157 page  ECCN 5E002 TSPA - Technology / Software Publicly Available MSP430F677x MSP430F676x MSP430F674x www.ti.com SLAS768C – SEPTEMBER 2012 – REVISED APRIL 2013 Table 5. Terminal Functions – PEU Package TERMINAL NO. I/O(1) DESCRIPTION NAME PEU XIN 1 I/O Input terminal for crystal oscillator XOUT 2 I/O Output terminal for crystal oscillator AUXVCC3 3 Auxiliary power supply AUXVCC3 for back up subsystem RTCCAP1 4 I External time capture pin 1 for RTC_C RTCCAP0 5 I External time capture pin 0 for RTC_C General-purpose digital I/O with port interrupt SMCLK clock output P1.5/SMCLK/CB0/A5 6 I/O Comparator_B input CB0 Analog input A5 - 10-bit ADC General-purpose digital I/O with port interrupt MCLK clock output P1.4/MCLK/CB1/A4 7 I/O Comparator_B input CB1 Analog input A4 - 10-bit ADC General-purpose digital I/O with port interrupt P1.3/ADC10CLK/A3 8 I/O ADC10_A clock output Analog input A3 - 10-bit ADC General-purpose digital I/O with port interrupt P1.2/ACLK/A2 9 I/O ACLK clock output Analog input A2 - 10-bit ADC General-purpose digital I/O with port interrupt Timer TA2 CCR1 capture: CCI1A input, compare: Out1 output P1.1/TA2.1/VeREF+/A1 10 I/O Positive terminal for the ADC's reference voltage for an external applied reference voltage Analog input A1 - 10-bit ADC General-purpose digital I/O with port interrupt Timer TA1 CCR1 capture: CCI1A input, compare: Out1 output P1.0/TA1.1/VeREF-/A0 11 I/O Negative terminal for the ADC's reference voltage for an external applied reference voltage Analog input A0 - 10-bit ADC General-purpose digital I/O with port interrupt and mappable secondary function P2.4/PM_TA2.0 12 I/O Default mapping: Timer TA2 capture CCR0: CCI0A input, compare: Out0 output General-purpose digital I/O with port interrupt and mappable secondary function P2.5/PM_UCB0SOMI/ 13 I/O Default mapping: eUSCI_B0 SPI slave out master in PM_UCB0SCL Default mapping: eUSCI_B0 I2C clock General-purpose digital I/O with port interrupt and mappable secondary function P2.6/PM_UCB0SIMO/ 14 I/O Default mapping: eUSCI_B0 SPI slave in master out PM_UCB0SDA Default mapping: eUSCI_B0 I2C data General-purpose digital I/O with port interrupt and mappable secondary function P2.7/PM_UCB0CLK 15 I/O Default mapping: eUSCI_B0 clock input/output General-purpose digital I/O with mappable secondary function P3.0/PM_UCA0RXD/ 16 I/O Default mapping: eUSCI_A0 UART receive data PM_UCA0SOMI Default mapping: eUSCI_A0 SPI slave out master in General-purpose digital I/O with mappable secondary function P3.1/PM_UCA0TXD/ 17 I/O Default mapping: eUSCI_A0 UART transmit data PM_UCA0SIMO Default mapping: eUSCI_A0 SPI slave in master out (1) I = input, O = output Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 |
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