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WE

OE

CE

32−Pin DIP Module

(TOP VIEW)

bq4015/Y/LY

www.ti.com

SLUS125B – MAY 1999 – REVISED JANUARY 2010

512 k × 8 NONVOLATILE SRAM (5 V, 3.3 V)

Check for Samples: bq4015/Y/LY

The control circuitry constantly monitors the single

1

FEATURES

•

Data Retention for at least 10 Years Without

falls out of tolerance, the SRAM is unconditionally

Power

write-protected

to

prevent

an

inadvertent

write

•

Automatic Write-Protection During

operation.

Power-up/Power-Down Cycles

At this time the integral energy source is switched on

•

Conventional SRAM Operation, Including

Unlimited Write Cycles

The bq4015/Y/LY uses extremely low standby current

•

Internal Isolation of Battery before Power

CMOS SRAMs, coupled with small lithium coin cells

Application

to provide nonvolatility without long write-cycle times

•

5-V or 3.3-V Operation

and

the

write-cycle

limitations

associated

with

EEPROM.

•

Industry Standard 32-Pin DIP Package

The bq4015/Y/LY requires no external circuitry and is

GENERAL DESCRIPTION

compatible with the industry-standard 4-Mb SRAM

pinout.

The

CMOS

bq4015/Y/LY

is

a

nonvolatile

4,194,304-bit static RAM organized as 524,288 words

by 8 bits. The integral control circuitry and lithium

energy source provide reliable nonvolatility coupled

with the unlimited write cycles of standard SRAM.

PIN CONNECTIONS

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2010, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Not Recommended For New Designs