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PIC18F66J50 Datasheet(PDF) 8 Page - Microchip Technology |
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PIC18F66J50 Datasheet(HTML) 8 Page - Microchip Technology |
8 / 16 page PIC18F87J50 FAMILY DS80481A-page 8 © 2009 Microchip Technology Inc. 5. Module: Section 19.3 “SPI Mode” and Section 19.4 “I2C™ Mode” In Section 19.3 “SPI Mode” on page 231 and Section 19.4 “I2C™ Mode” on page 241, the following note is added to describe the procedure to disable the MSSP module: 6. Module: Figure 19-10: I2C™ Slave Mode Timing (Transmission, 7-Bit Address) On page 252, the figure is replaced with the new timing diagram provided in Figure 19-10. Note: Disabling the MSSP module by clearing the SSPEN bit (SSPxCON1<5>) may not reset the module. It is recommended to clear the SSPxSTAT, SSPxCON1 and SSPxCON2 registers and select the mode prior to setting the SSPEN bit to enable the MSSP module. |
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