DRV11873

SLWS237 – NOVEMBER 2012

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ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

VALUE

UNIT

MIN

MAX

VCC

-0.3

20

CS

-0.3

3.6

Input voltage range

PWMIN, FS, FR

-0.3

6

V

GND

-0.3

0.3

COM

-1

20

U, V, W

-1

20

FG, RD

-0.3

20

VCP

-0.3

25

Output voltage range

V

CPN

-0.3

20

CPP

-0.3

25

V5

-0.3

6

Human body model, HBM

4

kV

Electrostatic discharge (ESD)

Charge device model, CBM

1

Machine model, MM

200

V

Operating junction temperature

-40

125

°C

-55

150

°C

THERMAL INFORMATION

DRV11873

PWP

UNITS

16 PINS

39.4

30.3

25.6

°C/W

0.5

10.2

3.6

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

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