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BQ2018TS-E1TRG4 Datasheet(PDF) 4 Page - Texas Instruments

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Part # BQ2018TS-E1TRG4
Description  Power Minder IC
Download  25 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

BQ2018TS-E1TRG4 Datasheet(HTML) 4 Page - Texas Instruments

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4
RBI Input
The RBI input pin is used with a storage capacitor or ex-
ternal supply to provide back-up potential to the internal
RAM when VCC drops below 2.4V. The maximum dis-
charge current is 100nA in this mode. The bq2018 out-
puts VCC on RBI when the supply is above 2.4V, so a di-
ode is required to isolate an external supply.
Charge/Discharge Count Operation
Table 2 shows the main counters and registers of the
bq2018. The bq2018 accumulates charge and discharge
counts into two main count registers, the Discharge
Count Register (DCR) and the Charge Count Register
(CCR).
The bq2018 produces charge and discharge
counts by sensing the voltage difference across a low-
value resistor between the negative terminal of the bat-
tery pack and the negative terminal of the battery. The
DCR or CCR counts depending on the signal between
SR1 and SR2.
During discharge, the DCR and the Discharge Time
Counter (DTC) are active. If VSR1 is less than VSR2, indi-
cating a discharge, the DCR counts at a rate equivalent to
12.5
µV every hour, and the DTC counts at a rate of 1
count/0.8789 seconds (4096 counts per 1 hour). For exam-
ple, a -100mV signal produces 8000 DCR counts and 4096
DTC counts each hour.
The amount of charge removed
from the battery can easily be calculated.
bq2018
Table 2. bq2018 Counters
Name
Description
Range
RAM Size
DCR
Discharge count register
VSR1 < VSR2 (Max. =-200mV) 12.5µVh increments
16-bit
CCR
Charge count register
VSR1 >VSR2 (Max. = +200mV) 12.5µVh increments
16-bit
SCR
Self-discharge count register
1 count/hour @ 25°C
16-bit
DTC
Discharge time counter
1 count/0.8789s default
1 count/225s if STD is set
16-bit
CTC
Charge time counter
1 count/0.8789s default
1 count/225s if STC is set
16-bit
MODE/
WOE
MODE/
Wake output enable
8-bit
RBI
SR2
SR1
WAKE
HDQ
VSS
VCC
REG
BQ2018
U1
1
2
3
45
6
7
8
C1
VCC
SST113
Q1
BAT+
BZX84C5V6
D1
2
HDQ
BZX84C5V6
D2
2
100
R5
C4
C2
C3
BAV99
D3
1M
d
s
R4
RBI
PACK-
BAT-
1W
0.05
R1
100K
R3
100K
R2
WAKE
1K
R6
VCC
0.01
µF
0.1
µF
0.1
µF
0.1
µF
0.1
µF
C5
2018typAp.eps
Figure 2. Typical Application


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