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AD7945BN Datasheet(PDF) 9 Page - Analog Devices |
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AD7945BN Datasheet(HTML) 9 Page - Analog Devices |
9 / 16 page AD7943/AD7945/AD7948 REV. B –9– AD7943 PIN FUNCTION DESCRIPTIONS Pin Mnemonic Description IOUT1 DAC current output terminal 1. IOUT2 DAC current output terminal 2. This should be connected to the AGND pin. AGND This pin connects to the back gates of the current steering switches. In normal operation, it should be connected to the signal ground of the system. In biased single-supply operation it may be biased to some voltage between 0 V and the 1.23 V. See Figure 11 for more details. STB1 This is the Strobe 1 input. Data is clocked into the input shift register on the rising edge of this signal. STB3 must be high. STB2, STB4 must be low. LD1, LD2 Active low inputs. When both of these are low, the DAC register is updated and the output will change to reflect this. SRI Serial Data Input. Data on this line will be clocked into the input shift register on one of the Strobe inputs, when they are enabled. STB2 This is the Strobe 2 input. Data is clocked into the input shift register on the rising edge of this signal. STB3 must be high. STB1, STB4 must be low. STB3 This is the Strobe 3 input. Data is clocked into the input shift register on the falling edge of this signal. STB1, STB2, STB4, must be low. STB4 This is the Strobe 4 input. Data is clocked into the input shift register on the rising edge of this signal. STB3 must be high. STB1, STB2 must be low. DGND Digital Ground. CLR Asynchronous CLR input. When this input is taken low, all 0s are loaded to the DAC latch. VDD Power supply input. This is nominally +5 V for Normal Mode Operation and +3.3 V to +5 V for Biased Mode Operation. VREF DAC reference input. RFB DAC feedback resistor pin. AD7945 PIN FUNCTION DESCRIPTIONS Pin Mnemonic Description IOUT1 DAC current output terminal 1. AGND This pin connects to the back gates of the current steering switches. The DAC IOUT2 terminal is also connected internally to this point. DGND Digital Ground. DB11–DB0 Digital Data Inputs. CS Active Low, Chip Select Input. WR Active Low, Write Input. VDD Power supply input. This is nominally +5 V for Normal Mode Operation and +3.3 V to +5 V for Biased Mode Operation. VREF DAC reference input. RFB DAC feedback resistor pin. |
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