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NDS8852H Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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NDS8852H Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 12 page Electrical Characteristics (T A = 25°C unless otherwise noted) Symbol Parameter Conditions Type Min Typ Max Units SWITCHING CHARACTERISTICS (Note 3) t D(on) Turn - On Delay Time N-Channel V DD = 10 V, ID = 1 A, V GEN = 10 V, RGEN = 6 Ω P-Channel V DD = -10 V, ID = -1 A, V GEN = -10 V, RGEN = 6 Ω N-Ch 10 15 ns P-Ch 9 40 t r Turn - On Rise Time N-Ch 13 20 ns P-Ch 21 40 t D(off) Turn - Off Delay Time N-Ch 21 50 ns P-Ch 21 90 t f Turn - Off Fall Time N-Ch 5 50 ns P-Ch 8 50 Q g Total Gate Charge N-Channel V DS = 10 V, I D = 3.4 A, V GS = 10 V P-Channel V DS = -10 V, I D = -3.4 A, VGS = -10 V N-Ch 9.5 27 nC P-Ch 10 25 Q gs Gate-Source Charge N-Ch 1.5 P-Ch 1.6 Q gd Gate-Drain Charge N-Ch 2.6 P-Ch 2.7 DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS I S Maximum Continuous Drain-Source Diode Forward Current N-Ch 2.1 A P-Ch -2.1 V SD Drain-Source Diode Forward Voltage V GS = 0 V, IS = 2.1 A (Note 2) N-Ch 0.8 1.2 V V GS = 0 V, IS = -2.1 A (Note 2) P-Ch -0.8 -1.2 t rr Reverse Recovery Time N-Channel V GS = 0 V, IF = 2.1 A, dIF/dt = 100 A/µs N-Ch 100 ns P-Channel V GS = 0 V, IF = -2.1 A, dIF/dt = 100 A/µs P-Ch 100 Notes: 1. R θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while R θCA is determined by the user's board design. PD (t) = TJ−TA R θJ A(t) = TJ −T A R θJ C+RθCA(t) = I D 2 (t) × R DS (ON ) TJ Typical R θJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 50oC/W when mounted on a 1 in2 pad of 2oz cpper. b. 105 oC/W when mounted on a 0.04 in2 pad of 2oz cpper. c. 125 oC/W when mounted on a 0.006 in2 pad of 2oz cpper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS8852H Rev. C1 1a 1b 1c |
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Similar Description - NDS8852H |
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