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RMLV0414EGSB-5S2 Datasheet(PDF) 6 Page - Renesas Technology Corp |
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RMLV0414EGSB-5S2 Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 12 page RMLV0408E Series Preliminary R10DS0217EJ0001 Rev.0.01 Page 6 of 10 2013.09.10 Timing Waveforms Read Cycle Note 11. tCHZ and tOHZ are defined as the time when the I/O pins enter a high-impedance state and are not referred to the I/O levels. 12. This parameter is sampled and not 100% tested. 13. At any given temperature and voltage condition, tCHZ max is less than tCLZ min, and tOHZ max is less than tOLZ min, for any device. tAA CS# A0~18 tOH tCLZ tACS tOE tOLZ tCHZ OE# I/O0~7 tOHZ High impedance tRC Valid address Valid Data *11,12,13 *11,12,13 *12,13 *12,13 WE# VIH WE# = “H” level |
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