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SN65HVD233SKGDA Datasheet(PDF) 6 Page - Texas Instruments |
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SN65HVD233SKGDA Datasheet(HTML) 6 Page - Texas Instruments |
6 / 32 page SN65HVD233-HT SLLS933F – NOVEMBER 2008 – REVISED AUGUST 2012 www.ti.com FUNCTION TABLES (1) (1) H = high level, L = low level, Z = high impedance, X = irrelevant, ? = indeterminate DRIVER INPUTS OUTPUTS D LBK Rs CANH CANL BUS STATE X X >0.75 VCC Z Z Recessive L L or open H L Dominant ≤0.33 VCC H or open X Z Z Recessive X H ≤0.33 VCC Z Z Recessive RECEIVER INPUTS OUTPUT BUS STATE VID = V(CANH) – V(CANL) LBK D R Dominant VID ≥ 0.9 V L or open X L Recessive VID ≤ 0.5 V or open L or open H or open H ? 0.5 V < VID < 0.9 V L or open H or open ? X X L L H X X H H ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range (unless otherwise noted) VALUE UNIT VCC Supply voltage range –0.3 to 7 V Voltage range at any bus terminal (CANH or CANL) –36 to 36 V Voltage input range, transient pulse (CANH and CANL) through 100 Ω (see Figure 8) –100 to 100 V VI Input voltage range (D, R, RS, LBK) –0.5 to 7 V IO Receiver output current –10 to 10 mA CANH, CANL, and GND 16 Human-Body Model (HBM)(3) Electrostatic discharge All pins 3 kV Charged-Device Mode (CDM)(4) All pins 1 (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. (3) Tested in accordance with JEDEC Standard 22, Test Method A114-A. (4) Tested in accordance with JEDEC Standard 22, Test Method C101. 6 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Links: SN65HVD233-HT |
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