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TLC32044EFN Datasheet(PDF) 1 Page - Texas Instruments |
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TLC32044EFN Datasheet(HTML) 1 Page - Texas Instruments |
1 / 39 page TLC32044C, TLC32044E, TLC32044I, TLC32044M, TLC32045C, TLC32045I VOICE-BAND ANALOG INTERFACE CIRCUITS SLAS017F − MARCH 1988 − REVISED MAY 1995 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 14-Bit Dynamic Range ADC and DAC D 2’s Complement Format D Variable ADC and DAC Sampling Rate Up to 19,200 Samples per Second D Switched-Capacitor Antialiasing Input Filter and Output-Reconstruction Filter D Serial Port for Direct Interface to TMS(SMJ)320C17, TMS(SMJ)32020, TMS(SMJ)320C25, and TMS320C30 Digital Signal Processors D Synchronous or Asynchronous ADC and DAC Conversion Rates With Programmable Incremental ADC and DAC Conversion Timing Adjustments D Serial Port Interface to SN74(54)299 Serial-to-Parallel Shift Register for Parallel Interface to TMS(SMJ)32010, TMS(SMJ)320C15, or Other Digital Processors D Internal Reference for Normal Operation and External Purposes, or Can Be Overridden by External Reference D CMOS Technology description The TLC32044 and TLC32045 are complete analog-to-digital and digital-to-analog input and output systems on single monolithic CMOS chips. The TLC32044 and TLC32045 integrate a bandpass switched-capacitor antialiasing input filter, a 14-bit-resolution A/D converter, four microprocessor-compatible serial port modes, a 14-bit-resolution D/A converter, and a low-pass switched-capacitor output-reconstruction filter. The devices offer numerous combinations of master clock input frequencies and conversion/ sampling rates, which can be changed via digital processor control. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 NU RESET EODR FSR DR MSTR CLK VDD REF DGTL GND SHIFT CLK EODX DX WORD/BYTE FSX NU NU IN + IN − AUX IN + AUX IN − OUT + OUT − VCC + VCC − ANLG GND ANLG GND NU NU J† OR N PACKAGE (TOP VIEW) 32 1 13 14 5 6 7 8 9 10 11 IN − AUX IN + AUX IN − OUT + OUT − VCC + VCC − DR MSTR CLK VDD REF DGTL GND SHIFT CLK EODX 4 15 16 17 18 28 27 26 25 24 23 22 21 20 19 12 NU − Nonusable; no external connection should be made to these terminals (see Table 2). FK OR FN PACKAGE (TOP VIEW) † Refer to the mechanical data for the JT package. |
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