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NC7SZ58L6X Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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NC7SZ58L6X Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 11 page 3 www.fairchildsemi.com Function Selection Table Logic Configurations NC7SZ57 Figure 1 through Figure 5 show the logical functions that can be implemented using the NC7SZ57. The diagrams show the DeMorgan’s equivalent logic duals for a given 2-input function. Next to the logical implementation is the board level physical implementation of how the pins of the function should be connected. FIGURE 1. 2-Input AND Gate FIGURE 2. 2-Input NAND with Inverted A Input FIGURE 3. 2-Input NAND with Inverted B Input FIGURE 4. 2-Input NOR Gate FIGURE 5. 2-Input XNOR Gate 2-Input Logic Function Device Connection Selection Configuration 2-Input AND NC7SZ57 Figure 1 2-Input AND with inverted input NC7SZ58 Figures 7, 8 2-Input AND with both inputs inverted NC7SZ57 Figure 4 2-Input NAND NC7SZ58 Figure 6 2-Input NAND with inverted input NC7SZ57 Figures 2, 3 2-Input NAND with both inputs inverted NC7SZ58 Figure 9 2-Input OR NC7SZ58 Figure 9 2-Input OR with inverted input NC7SZ57 Figures 2, 3 2-Input OR with both inputs inverted NC7SZ58 Figure 6 2-Input NOR NC7SZ57 Figure 4 2-Input NOR with inverted input NC7SZ58 Figures 7, 8 2-Input NOR with both inputs inverted NC7SZ57 Figure 1 2-Input XOR NC7SZ58 Figure 10 2-Input XNOR NC7SZ57 Figure 5 |
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Similar Description - NC7SZ58L6X |
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