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NC7SZ373 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part # NC7SZ373
Description  TinyLogic UHS D-Type Latch with 3-STATE Output
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

NC7SZ373 Datasheet(HTML) 4 Page - Fairchild Semiconductor

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4
AC Electrical Characteristics
Capacitance (Note 3)
Note 3: TA = +25C, f = 1 MHz.
Note 4: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
Symbol
Parameter
VCC
TA = +25°CTA = −40°C to +85°C
Units
Conditions
Figure
Number
(V)
Min
TypMax
MinMax
tPLH
Propagation Delay
1.65
2.0
9.0
15.0
2.0
16.0
ns
Figures
1, 3
tPHL
D to Q
1.8
2.0
6.1
10.0
2.0
10.5
2.5
± 0.2
1.5
3.6
6.5
1.6
6.8
CL = 15 pF
3.3
± 0.3
1.0
2.7
4.6
1.2
5.0
RD = 1 MΩ
5.0
± 0.5
1.0
2.0
3.4
1.0
3.7
S1 = Open
3.3
± 0.3
1.5
3.3
5.5
1.5
6.2
CL = 50 pF
Figures
1, 3
5.0
± 0.5
1.0
2.6
4.3
1.3
4.8
RD = 500Ω, S1 = Open
tPLH
Propagation Delay
1.65
2.0
9.0
1.45
2.0
15.0
ns
Figures
1, 3
tPHL
LE to Q
1.8
2.0
6.0
9.6
2.0
10.0
2.5
± 0.2
1.8
3.5
6.1
1.5
6.6
CL = 15 pF
3.3
± 0.3
1.3
2.6
4.4
1.0
4.8
RD = 1 MΩ
5.0
± 0.5
1.0
2.0
3.2
0.8
3.5
S1 = Open
3.3
± 0.3
1.5
3.3
5.3
1.5
6.2
CL = 50 pF
Figures
1, 4
5.0
± 0.5
1.3
2.6
4.2
1.2
4.6
RD = 500Ω, S1 = Open
tPZL
Output Enable Time
1.65
2.0
9.0
13.5
2.0
14.6
ns
Figures
1, 4
tPZH
1.8
2.0
6.0
9.0
2.0
9.5
CL = 50 pF, VI = 2x VCC
2.5
± 0.2
2.0
3.7
6.0
1.8
6.6
RU, RD = 500Ω
3.3
± 0.3
1.5
2.8
5.0
1.4
5.3
S1
= GND for t
PZH
5.0
± 0.5
1.0
2.2
3.7
1.0
3.9
S1
= V
I for tPZL
tPLZ
Output Disable Time
1.65
2.0
7.7
12.0
2.0
13.0
ns
Figures
1, 4
tPHZ
1.8
2.0
5.1
8.0
2.0
8.5
CL = 50 pF, VI = 2x VCC
2.5
± 0.2
2.0
3.5
6.0
1.8
6.3
RU, RD = 500Ω
3.3
± 0.3
1.5
2.8
4.5
1.4
4.7
S1 = GND for tPHZ
5.0
± 0.5
1.0
2.3
3.7
1.0
3.9
S1 = VI for tPLZ
tS
Setup Time,
2.5
± 0.2
2.0
ns
CL = 50 pF
Figures
1, 5
D to LE
3.3
± 0.3
1.5
RD = 500 Ω, S1 = Open
5.0
± 0.5
1.5
tH
Hold Time,
2.5
± 0.2
1.5
ns
CL = 50 pF
Figures
1, 5
D to LE
3.3
± 0.3
1.5
RD = 500 Ω, S1 = Open
5.0
± 0.5
1.5
tW
Pulse Width, LE
2.5
± 0.2
3.0
ns
Figures
1, 5
3.3
± 0.3
3.0
CL = 50 pF
5.0
± 0.5
3.0
RD = 500 Ω, S1 = Open
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Input Capacitance
3
pF
VCC = Open, VIN = 0V or VCC
COUT
Output Capacitance
4
pF
VCC = 3.3V, VIN = 0V or VCC
CPD
Power Dissipation Capacitance
14
pF
VCC = 3.3V
(Note 4)
17
VCC = 5.0V


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