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AD9822JRSZ Datasheet(PDF) 7 Page - Analog Devices |
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AD9822JRSZ Datasheet(HTML) 7 Page - Analog Devices |
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7 / 20 page  AD9822 Rev. B | Page 7 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS CDSCLK1 CDSCLK2 ADCCLK OEB AVDD 28 AVSS 27 VINR 26 OFFSET 25 DRVDD DRVSS (MSB) D7 VING 24 CML 23 VINB 22 D6 CAPT 21 D5 CAPB 20 D4 10 AVSS 19 D3 11 AVDD 18 D2 12 SLOAD 17 D1 13 SCLK 16 (LSB) D0 14 SDATA 15 1 2 3 4 5 6 7 8 9 AD9822 TOP VIEW (Not to Scale) Figure 2. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Type1 Description 1 CDSCLK1 DI CDS Reference Level Sampling Clock. 2 CDSCLK2 DI CDS Data Level Sampling Clock. 3 ADCCLK DI ADC Sampling Clock. 4 OEB DI Output Enable, Active Low. 5 DRVDD P Digital Output Driver Supply. 6 DRVSS P Digital Output Driver Ground. 7 D7 (MSB) DO Data Output MSB. ADC DB13 High Byte, ADC DB5 Low Byte. 8 D6 DO Data Output. ADC DB12 High Byte, ADC DB4 Low Byte. 9 D5 DO Data Output. ADC DB11 High Byte, ADC DB3 Low Byte. 10 D4 DO Data Output. ADC DB10 High Byte, ADC DB2 Low Byte. 11 D3 DO Data Output. ADC DB9 High Byte, ADC DB1 Low Byte. 12 D2 DO Data Output. ADC DB8 High Byte, ADC DB0 Low Byte. 13 D1 DO Data Output. ADC DB7 High Byte, Don’t Care Low Byte. 14 D0 (LSB) DO Data Output LSB. ADC DB6 High Byte, Don’t Care Low Byte. 15 SDATA DI/DO Serial Interface Data Input/Output. 16 SCLK DI Serial Interface Clock Input. 17 SLOAD DI Serial Interface Load Pulse. 18 AVDD P 5 V Analog Supply. 19 AVSS P Analog Ground. 20 CAPB AO ADC Bottom Reference Voltage Decoupling. 21 CAPT AO ADC Top Reference Voltage Decoupling. 22 VINB AI Analog Input, Blue Channel. 23 CML AO Internal Bias Level Decoupling. 24 VING AI Analog Input, Green Channel. 25 OFFSET AO Clamp Bias Level Decoupling. 26 VINR AI Analog Input, Red Channel. 27 AVSS P Analog Ground. 28 AVDD P 5 V Analog Supply. 1 Type: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power. |
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