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AME8855BET100 Datasheet(PDF) 5 Page - Analog Microelectronics |
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AME8855BET100 Datasheet(HTML) 5 Page - Analog Microelectronics |
5 / 34 page AME 5 AME8855 Rev. C.02 High PSRR, Low Noise, 600mA CMOS Regulator SOP-8 n Pin Configuration Pin Name Pin Description IN Input voltage pin; should be decoupled with 1µF or greater capacitor. GND Ground connection pin. GND Ground connection pin. OUT LDO voltage regulator output pin; should be decoupled with a 1.0µF or greater value low ESR ceramic capacitor. NC No connection. GND Ground connection pin. GND Ground connection pin. EN Enable pin, Active “high". When pulled “low”, the PMOS pass transistor turns off, current consuming less than 1µA. When EN pin floating outside, it’s weakly pulled high from internal MOS . 2 3 4 Pin Number 1 5 6 7 8 |
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