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TMS470R1A288PGEQ Datasheet(PDF) 9 Page - Texas Instruments |
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TMS470R1A288PGEQ Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 62 page  www.ti.com ZPLL MibADC 64−Word FIFO HET 64 Words SCC1 SCC2 SCI1 SCI2 I2C3 I2C2 I2C1 OSCIN OSCOUT PLLDIS ADIN[11:0] ADEVT ADREFHI ADREFLO VCCAD VSSAD HET[0:8;18,30,22] CAN1TX CAN1RX CAN2TX CAN2RX SCI1CLK SCI1TX SCI1RX SCI2CLK SCI2TX SCI2RX I2C3SDA I2C3SCL I2C2SDA I2C2SCL I2C1SDA I2C1SCL HECC C2SI SPI2 SPI1 ECP GIO/EBM(A) ICE Breaker TMS470R1x CPU TMS470R1x System Module with Enhanced RTI Module(A) DMA Controller 16 Channels Interrupt Expansion Module (IEM) Digital Watchdog (DWD) Analog Watchdog (AWD) Memory Security Module (MSM) FLASH (288K Byte) 2 Banks 8 Sectors RAM (16K Bytes) CPU Address Data Bus VCCP FLTP2 TRST TCK TDI TDO TMS TMS2 RST AWD TEST PORRST CLKOUT External Pins Pins External TMS470R1A288 16/32-Bit RISC Flash Microcontroller SPNS106B – SEPTEMBER 2005 – REVISED AUGUST 2006 Functional Block Diagram A. The enhanced RTI module is the system module with two extra bits to disable the ZPLL while in STANDBY mode. B. GIOC[4:0], GIOD[5:0], GIOE[5:0], GIOF[7:0], and GIOH[0], which are muxed with EBM, are not available on the PZ package. See Table 7 for EBM-to-GIO mapping. 9 Submit Documentation Feedback |
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