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ADS7881 Datasheet(PDF) 11 Page - Texas Instruments |
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ADS7881 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 29 page www.ti.com †Signal internal to device tCONV CONVST BUSY CS = 0 CONVERT† SAMPLING† (When CS = 0) BYTE RD tw1 tpd2 tpd1 tw4 tw2 tw3 tCONV t(ACQ) th1 th2 ten tdis D [7:0] Hi−Z Hi−Z DB[15:8] Hi−Z Hi−Z D [15:8] D [7:0] DB[7:0] tsu4 tcycle tsu(AB) tsu(AB) CONVST (used in ABORT) (used in normal conversion) tpd1 Data to be read† Invalid Invalid th4 tsu5 Previous Conversion Current Conversion ADS8406 SLAS426A – AUGUST 2004 – REVISED DECEMBER 2004 TIMING DIAGRAMS (continued) Figure 3. Timing for Conversion and Acquisition Cycles With CS Tied to BDGND, RD Toggling 11 |
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