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S1C88816 Datasheet(PDF) 7 Page - Epson Company

Part # S1C88816
Description  8-bit Single Chip Microcomputer
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Manufacturer  EPSON [Epson Company]
Direct Link  http://www.epsondevice.com
Logo EPSON - Epson Company

S1C88816 Datasheet(HTML) 7 Page - Epson Company

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S1C88816
q Recommended Operating Conditions
Item
Symbol
Min.
Typ.
Max.
Unit
Condition
Operating power voltage (Normal mode)
Operating power voltage (Low power mode)
Operating power voltage (High speed mode)
Analog power voltage
Operating frequency (Normal mode)
Operating frequency (Low power mode)
Operating frequency (High speed mode)
Liquid crystal power voltage
Capacitor between VD1 and VSS
Capacitor between VC1 and VSS
Capacitor between VC2 and VSS
Capacitor between VC3 and VSS
Capacitor between VC4 and VSS
Capacitor between VC5 and VSS
Capacitor between CA and CB
Capacitor between CA and CC
Capacitor between CD and CE
Capacitor between CF and CG
VDD
VDD
VDD
AVDD
fOSC1
fOSC3
fOSC1
fOSC1
fOSC3
VC5
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
2.4
1.8
3.5
VDD-0.05
30.000
0.03
30.000
30.000
0.03
32.768
32.768
32.768
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
5.5
5.5
5.5
VDD+0.05
80.000
4.2
80.000
80.000
8.2
6.0
V
V
V
V
kHz
MHz
kHz
kHz
MHz
V
µF
µF
µF
µF
µF
µF
µF
µF
µF
µF
AVDD
≥ 2.7 V
VDD = 2.4 to 5.5 V
VDD = 1.8 to 5.5 V
VDD = 3.5 to 5.5 V
VC5
≥ VC4 ≥ VC3 ≥ VC2 ≥ VC1 ≥ VSS
Note
1
1
1
1
1
2
3
3
3
3
3
3
3
3
3
(VSS=0V, Ta=-40 to 85
°C)
Note) 1
2
3
When an external clock is input from the OSC1 terminal by the mask option, leave the OSC2 terminal open, and when an external
clock is input from the OSC3 terminal, leave the OSC4 terminal open.
When external power supply is selected by the mask option.
When LCD drive power is not used, the capacitor is not necessary. In this case, leave the VC1 to VC5 and CA to CG terminals open.
q DC Characteristics
Item
Symbol
Min.
Typ.
Max.
Unit
Condition
High level input voltage (1)
Low level input voltage (1)
High level input voltage (2) (Normal mode)
High level input voltage (2)
High level input voltage (2) (High speed mode)
Low level input voltage (2) (Normal mode)
Low level input voltage (2)
Low level input voltage (2) (High speed mode)
High level schmitt input voltage
Low level schmitt input voltage
High level output current
Low level output current
Input leak current
Output leak current
Input pull-up resistance
Input terminal capacitance
Segment/Common output current
VIH1
VIL1
VIH2
VIH2
VIH2
VIL2
VIL2
VIL2
VT+
VT-
IOH
IOL
ILI
ILO
RIN
CIN
ISEGH
ISEGL
0.8VDD
0
1.6
1.0
2.4
0
0
0
0.5VDD
0.1VDD
0.5
-1
-1
100
5
300
7
VDD
0.2VDD
VDD
VDD
VDD
0.6
0.3
0.9
0.9VDD
0.5VDD
-0.5
1
1
500
15
-5
V
V
V
V
V
V
V
V
V
V
mA
mA
µA
µA
k
pF
µA
µA
Kxx, Pxx
Kxx, Pxx
OSC3
OSC1
OSC3
OSC3
OSC1
OSC3
RESET
RESET
Pxx, Rxx, VOH = 0.9VDD
Pxx, Rxx, VOL = 0.1VDD
Kxx, Pxx, RESET
Pxx, Rxx
Kxx, Pxx, RESET
Kxx, Pxx, VIN = 0V, f = 1MHz, Ta = 25
°C
SEGxx, COMxx, VSEGH = VC5-0.1V
SEGxx, COMxx, VSEGL = 0.1V
Note
1
1
1
1
1
1
2
(Unless otherwise specified: VDD=1.8 to 5.5V, VSS=0V, Ta=-40 to 85
°C)
Note) 1
2
When external clock is selected by mask option.
When pull-up resistor is added by mask option.
VDD
0
VDD
VT+
VIN [V]
VT-
0


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