4.5 DC SPECIFICATIONS

Note 2

fF

28

1,000

Sensitivity range

S

bits

14

Acquisition resolution

Resistance from SNS1 to SNS2

✡

1M

Min shunt resistance

pF

100

0

Load capacitance range

OPT1, OPT2

µA

±1

Input leakage current

OUT, 1mA source

V

Vdd-0.7

High output voltage

OUT, 4mA sink

V

0.6

Low output voltage

OPT1, OPT2

V

2.2

High input logic level

OPT1, OPT2

V

0.8

Low input logic level

Required for proper startup

V/s

100

Supply turn-on slope

µA

1,500

600

Supply current

V

5.25

2.45

Supply voltage

Notes

Units

Max

Typ

Min

Description

Parameter

Note 2: Sensitivity depends on value of Cx and Cs. Refer to Figures 4-1, 4-2.

- 9 -

Figure 4-1 - Typical Threshold Sensitivity vs. Cx,

High Gain, at Selected Values of Cs; Vdd = 3.0

0.01

0.10

1.00

10.00

0

102030

40

Cx Load, pF

10nF

20nF

50nF

100nF

200nF

500nF

Figure 4-2 - Typical Threshold Sensitivity vs. Cx,

Low Gain, at Selected Values of Cs; Vdd = 3.0

0.01

0.10

1.00

10.00

0

1020

3040

Cx Load, pF

10nF

20nF

50nF

100nF

200nF

500nF