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AD7910ARM Datasheet(PDF) 9 Page - Analog Devices |
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AD7910ARM Datasheet(HTML) 9 Page - Analog Devices |
9 / 24 page ![]() AD7910/AD7920 Rev. C | Page 9 of 24 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 GND 2 VIN 3 CS 6 SDATA 5 SCLK 4 AD7910/ AD7920 TOP VIEW (Not to Scale) Figure 5. 6-Lead SC70 Pin Configuration VDD 1 SDATA 2 CS 3 NC 4 VIN 8 GND 7 SCLK 6 NC 5 NC = NO CONNECT AD7910/ AD7920 TOP VIEW (Not to Scale) Figure 6. 8-Lead MSOP Pin Configuration Table 5. Pin Function Descriptions Pin No. 6-Lead SC70 Pin No. 8-Lead MSOP Mnemonic Description 6 3 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7910/AD7920 and framing the serial data transfer. 1 1 VDD Power Supply Input. The VDD range for the AD7910/AD7920 is from 2.35 V to 5.25 V. 2 7 GND Analog Ground. Ground reference point for all circuitry on the AD7910/AD7920. All analog input signals should be referred to this GND voltage. 3 8 VIN Analog Input. Single-ended analog input channel. The input range is 0 to VDD. 5 2 SDATA Data Out. Logic output. The conversion result from the AD7910/AD7920 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7920 consists of four leading zeros followed by the 12 bits of conversion data, which is provided MSB first. The data stream from the AD7910 consists of four leading zeros followed by the 10 bits of conversion data followed by two trailing zeros, which is also provided MSB first. 4 6 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD7910/AD7920 conversion process. N/A 4, 5 NC No Connect. |
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