6

ATtiny1634 [DATASHEET]

8303FS–AVR–08/2013

3.

General Information

3.1

Resources

A comprehensive set of drivers, application notes, data sheets and descriptions on development tools are available

for download at http://www.atmel.com/avr.

3.2

Code Examples

This documentation contains simple code examples that briefly show how to use various parts of the device. These

code examples assume that the part specific header file is included before compilation. Be aware that not all C

compiler vendors include bit definitions in the header files and interrupt handling in C is compiler dependent.

Please confirm with the C compiler documentation for more details.

For I/O Registers located in the extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must

be replaced with instructions that allow access to extended I/O. Typically, this means “LDS” and “STS” combined

with “SBRS”, “SBRC”, “SBR”, and “CBR”. Note that not all AVR devices include an extended I/O map.

3.3

Capacitive Touch Sensing

Atmel QTouch Library provides a simple to use solution for touch sensitive interfaces on Atmel AVR microcon-

trollers. The QTouch Library includes support for QTouch

Touch sensing is easily added to any application by linking the QTouch Library and using the Application Program-

ming Interface (API) of the library to define the touch channels and sensors. The application then calls the API to

retrieve channel information and determine the state of the touch sensor.

The QTouch Library is free and can be downloaded from the Atmel website. For more information and details of

implementation, refer to the QTouch Library User Guide – also available from the Atmel website.

3.4

Data Retention

Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20

years at 85°C or 100 years at 25°C.

4.

CPU Core

This section discusses the AVR core architecture in general. The main function of the CPU core is to ensure cor-

rect program execution. The CPU must therefore be able to access memories, perform calculations, control

peripherals, and handle interrupts.