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ONET4291VA Datasheet(PDF) 9 Page - Texas Instruments |
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ONET4291VA Datasheet(HTML) 9 Page - Texas Instruments |
9 / 23 page www.ti.com ABSOLUTE MAXIMUM RATINGS (1) RECOMMENDED OPERATING CONDITIONS ONET4291VA SLLS674 – SEPTEMBER 2005 TERMINAL FUNCTIONS (continued) TERMINAL TYPE DESCRIPTION NO. NAME 12 MONP Analog-out Photodiode current monitor. Sources a 50% replica of the photodiode current. Connect an external resistor to ground (GND). 13 CAPC Analog Compensation pin used to control the bandwidth of the APC loop. Connect a 0.01- µF capacitor to ground. 15 PD Analog Monitor photodiode input. The pin can source or sink current dependent on PDP register setting. Pin supplies >1.5-V reverse bias. 16 BIAS Analog VCSEL diode bias current source. Connect to laser anode through inductor. Murata BLM15HG102SN1 is recommended. 17, 20, EP GND Supply Circuit ground. The exposed die pad (EP) must be grounded. 18 MOD+ CML-out Non-inverted modulation current output. AC coupled to anode of common cathode VCSEL. On-chip 60- Ω back-terminated to VCC. 19 MOD– CML-out Inverted modulation current output. AC coupled through VCSEL matching resistor to ground (GND). On-chip 60- Ω back-terminated to VCC. over operating free-air temperature range (unless otherwise noted) VALUE / UNIT VCC Supply voltage –0.3 V to 4 V VDIS, VRZTC, VTS, VSCK, VSDA, VDIN+, Voltage at DIS, RZTC, TS, SCK, SDA, DIN+, DIN–, FLT, MONB, MONP, –0.3 V to 4 V VDIN–, VFLT, VMONB, VMONP, VCAPC, CAPC, PD, BIAS, MOD+, MOD–(2) VPD, VBIAS, VMOD+, VMOD– ESD ESD rating at all pins 3 kV (HBM) TJ,max Maximum junction temperature 125 °C TSTG Storage temperature range –65 °C to 85°C TA Characterized free-air operating temperature range –40 °C to 85°C TLEAD Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. PARAMETER CONDITIONS MIN TYP MAX UNIT VCC Supply voltage 2.9 3.3 3.6 V VIH CMOS input high voltage DIS, SCK, SDA 2 V VIL CMOS input low voltage DIS, SCK, SDA 0.8 V Bias output headroom voltage VCC– VBIAS, IBIAS = 10 mA 500 mV Control bit PDR = 1, step size = 2 µA 10 500 Photodiode current range µA Control bit PDR = 0, step size = 1 µA 5 250 RRZTC Zero TC resistor value(1) 1.22-V bias across resistor 29.7 30 30.3 k Ω VIN Differential input voltage swing 200 800 2400 mVp-p 20%–80%, fBIT = 1.25 Gbps 160 tR-IN Input rise time ps 20%–80%, fBIT≥ 2.125 Gbps 100 20%–80%, fBIT = 1.25 Gbps 160 tF-IN Input fall time ps 20%–80%, fBIT≥ 2.125 Gbps 100 TA Operating free-air temperature –40 85 °C (1) Changing the value alters DAC ranges. 9 |
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