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LMH0046MH Datasheet(PDF) 10 Page - Texas Instruments |
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LMH0046MH Datasheet(HTML) 10 Page - Texas Instruments |
10 / 20 page LMH0046 SNLS222F – APRIL 2006 – REVISED APRIL 2013 www.ti.com Control Inputs and Indicator Outputs SERIAL DATA RATE SELECTOR The Serial Data Rate Selector (RATE [1:0]) permits the user to fix the operating serial data rate. The pins have internal pull-downs which maintain a logic-low input condition unless externally driven to a logic-high condition. This input also serves to place the device in a test mode. The codes shown in Table 2 select the desired operating serial data rate. The LMH0046 then enters either the Auto-Rate Detect mode or a single operating rate. Selecting the 270 Mbps rate mode may also be used when reclocking DVB-ASI data. DVB-ASI data is MPEG2 coded data that is transmitted in 8B10B coding. The device will reclock this data without harmonic locking. Auto- Rate Detect mode may be used for any supported data rate, including DVB-ASI. Table 2. Data Rate Select Input Codes Rate [1:0] Data Rate Comments Code or Mode 00 Auto-Rate Detect mode 143 Mbps rate operation supported only in ARD mode 01 270 Mbps May be used to support DVB-ASI operation 10 1483/1485 Mbps LOCK DETECT The Lock Detect (LD) output, when high, indicates that data is being received and the PLL is locked. LD may be connected to the MUTE input to mute the data and clock outputs when no data signal is being received. See Table 3. MUTE The MUTE input, when low, mutes the serial data and clock outputs. It may be connected to Lock Detect or externally driven to mute or un-mute the outputs. If MUTE is connected to LD, then the data and clock outputs are muted when the PLL is not locked. This function overrides the Bypass function: see Table 3. MUTE has an internal pull-up device to enable the output by default. BYPASS/AUTO BYPASS The Bypass/Auto Bypass input, when high, forces the device to output the data without reclocking it. When this input is low, the device automatically bypasses the reclocking function when the device is in an unlocked condition or the detected data rate is a rate which the device does not support. See Table 3. BYPASS/AUTO BYPASS has an internal pull-down device. Table 3. Control Functionality LOCK DETECT OUTPUT MUTE BYPASS/AUTO BYPASS DEVICE STATUS 0 1 0 PLL unlocked, reclocker bypassed 1 1 0 PLL locked to supported data rate, reclocker not bypassed X 0 X Outputs muted 0 LOCK DETECT X Outputs muted 1 LOCK DETECT 0 PLL locked to supported data rate, reclocker not bypassed 1 LOCK DETECT 1 PLL locked to supported data rate, reclocker bypassed X 1 1 Outputs not muted, reclocker bypassed SD/HD The SD/HD output indicates whether the LMH0046 is processing SD or HD data rates. It may be used to control another device such as the LMH0002 cable driver. When this output is high it indicates that the data rate is 270 Mbps (or 143 Mbps). When low, the indicated data rate is 1483 or 1485 Mbps. The SD/HD output is a registered function and is only valid when the PLL is locked and the Lock Detect output is high. When the PLL is not locked (the Lock Detect output is low), the SD/HD output defaults to HD (low). The SD/HD output is undefined for a short time after lock detect assertion or de-assertion due to a data rate change on SDI. See Figure 6 for a timing diagram showing the relationship between SDI, Lock Detect, and SD/HD. 10 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LMH0046 |
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