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PBSS5130PAP Datasheet(PDF) 2 Page - NXP Semiconductors |
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PBSS5130PAP Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 17 page NXP Semiconductors PBSS5130PAP 30 V, 1 A PNP/PNP low VCEsat (BISS) transistor PBSS5130PAP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 December 2012 2 / 17 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 E1 emitter TR1 2 B1 base TR1 3 C2 collector TR2 4 E2 emitter TR2 5 B2 base TR2 6 C1 collector TR1 7 C1 collector TR1 8 C2 collector TR2 Transparent top view 6 7 8 5 4 1 2 3 DFN2020-6 (SOT1118) sym138 B1 E1 C2 B2 C1 TR1 TR2 E2 6. Ordering information Table 3. Ordering information Package Type number Name Description Version PBSS5130PAP DFN2020-6 plastic thermal enhanced ultra thin small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm SOT1118 7. Marking Table 4. Marking codes Type number Marking code PBSS5130PAP 2E 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per transistor VCBO collector-base voltage open emitter - -30 V VCEO collector-emitter voltage open base - -30 V VEBO emitter-base voltage open collector - -7 V IC collector current - -1 A ICM peak collector current single pulse; tp ≤ 1 ms - -2 A IB base current - -0.3 A |
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