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MM74HCT373N Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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MM74HCT373N Datasheet(HTML) 5 Page - Fairchild Semiconductor |
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5 / 9 page  5 www.fairchildsemi.com AC Electrical Characteristics MM74HCT373: VCC = 5.0V, tr = tf = 6 ns TA = 25°C (unless otherwise specified) AC Electrical Characteristics MM74HCT373: VCC = 5.0V ± 10%, tr = tf = 6 ns (unless otherwise specified) Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. Symbol Parameter Conditions Typ Guaranteed Units Limit tPHL, tPLH Maximum Propagation Delay CL = 45 pF 18 25 ns Data to Output tPHL, tPLH Maximum Propagation Delay CL = 45 pF 21 30 ns Latch Enable to Output tPZH, tPZL Maximum Enable Propagation Delay CL = 45 pF 20 28 ns Control to Output RL = 1 kΩ tPHZ, tPLZ Maximum Disable Propagation Delay CL = 5 pF 18 25 ns Control to Output RL = 1 kΩ tW Minimum Clock Pulse Width 16 ns tS Minimum Setup Time Data to Clock 5 ns tH Minimum Hold Time Clock to Data 10 ns Symbol Parameter Conditions TA=25°CTA=−40 to 85°CTA=−55 to 125°C Units Typ Guaranteed Limits tPHL, tPLH Maximum Propagation CL = 50 pF 22 30 37 45 ns Delay Data to Output CL = 150 pF 30 40 50 60 ns tPHL, tPLH Maximum Propagation Delay CL = 50 pF 25 35 44 53 ns Latch Enable to Output CL = 150 pF 32 45 56 68 ns tPZH, tPZL Maximum Enable Propagation CL = 50 pF 21 30 37 45 ns Delay Control to Output CL = 150 pF 30 40 50 60 ns RL = 1 kΩ tPHZ, tPLZ Maximum Disable Propagation CL = 50 pF 21 30 37 45 ns Delay Control to Output RL = 1 kΩ tTHL, tTLH Maximum Output Rise CL = 50 pF 8 12 15 18 ns and Fall Time tW Minimum Clock Pulse Width 16 20 24 ns tS Minimum Setup Time Data to Clock 5 6 8 ns tH Minimum Hold Time Clock to Data 10 13 20 ns CIN Maximum Input Capacitance 10 10 10 pF COUT Maximum Output Capacitance 20 20 20 pF CPD Power Dissipation Capacitance OC = V CC 5pF (Note 5) OC = GND 52 pF |
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