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500SEBAMACFR Datasheet(PDF) 2 Page - Silicon Laboratories |
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500SEBAMACFR Datasheet(HTML) 2 Page - Silicon Laboratories |
2 / 6 page Si500S 2 Rev. 1.1 Supply Current 1.8 V option, 40 pF, 40 MHz, CMOS — 13.9 16 mA 1.8 V option, 10 pF, 200 MHz, CMOS — 16.7 19 mA 2.5 V option, 40 pF, 40 MHz, CMOS — 15.8 18 mA 2.5 V option, 10 pF, 200 MHz, CMOS — 19.3 22 mA 3.3 V option, 40 pF, 40 MHz, CMOS — 17.7 20 mA 3.3 V option, 10 pF, 200 MHz, CMOS — 21.5 24 mA SSTL-3.3, 200 MHz — 18.1 20.2 mA SSTL-2.5, 200 MHz — 18.0 19.7 mA SSTL-1.8, 200 MHz — 16.8 18.7 mA Output Stopped, CMOS — 11.8 13.1 mA Tri-State — 9.7 10.7 mA Powerdown — 1.0 1.9 mA Output Symmetry 0.5 x VDD 46 – 13 ns/TCLK — 54 + 13 ns/TCLK % Rise and Fall Times3 CMOS, CL = 15 pF measured from 20 to 80% of VDD —1.4 2.0 ns SSTL — — 0.6 ns CMOS Output Voltage VOH, sourcing 9 mA VDD –0.5 — — V VOL, sinking 9 mA — — 0.5 V SSTL-1.8 Output Voltage4 VOH VTT + 0.375 — — V VOL —— VTT – 0.375 SSTL-2.5 Output Voltage4 VOH VTT + 0.48 — — V VOL —— VTT – 0.48 SSTL-3.3 Output Voltage5 VOH VTT + 0.48 — — V VOL —— VTT – 0.48 Powerup Time From time VDD crosses min spec supply —— 2 ms OE Deassertion to Clk Stop — — 250 + 3xTCLK ns Return from Output Driver Stopped Mode —— 250 + 3xTCLK ns Return from Tri-State Time — — 12 + 3 x TCLK µs Return from Powerdown Time — — 2 ms Period Jitter (1-sigma) SSTL3 —1 2 ps RMS Integrated Phase Jitter 1MHz –0.4 xFOUT, SSTL or CMOS and CL < 7pF, FOUT > 2.5 MHz —0.7 1.5 ps RMS Parameters Condition Min Typ Max Units Notes: 1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change, first-year aging at 25 °C, shock, vibration, and one solder reflow. 2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change, ten-year aging at 85 °C, shock, vibration, and one solder reflow. 3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding output clock termination recommendations. 4. VTT = .5 x VDD. 5. VTT = .45 x VDD. |
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