3

Figure 5. Gain at 3.5GHz; LSL=11dB, nominal =12.8dB, USL=14dB

CPK = 2.34

Stdev = 0.17

Notes:

1. Distribution data sample size is 500 samples taken from 3 different wafer lots and 3 different wafers. Future wafers allocated to this product may

have nominal values anywhere between the upper and lower limits.

2. Measurements were made on a characterization test board, which represents a trade-off between optimal OIP3, gain, P1dB and PAE. Circuit trace

losses have not been de-embedded from measurements above.

Figure 3. P1dB at 3.5GHz; LSL=27dBm, nominal =28.5dBm

Figure 4. PAE@P1dB 3.5GHz; nominal=51.3%

Figure 1. Ids at 3.5GHz; LSL=155mA, nominal =198mA, USL=250mA

Figure 2. OIP3 at 3.5GHz; LSL=40dBm, nominal=44.4dBm

CPK = 1.25,

Stdev = 11.4

CPK = 5.68

Stdev = 0.087

CPK = 3.38

Stdev = 0.44

Stdev = 0.56