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MM74HC175SJ Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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MM74HC175SJ Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page www.fairchildsemi.com 4 AC Electrical Characteristics VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns AC Electrical Characteristics VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Note 5: CPD determines the no load dynamic power consumption, PD=CPD VCC 2f +I CC VCC, and the no load dynamic current consumption, IS=CPD VCC f+ICC. Symbol Parameter Conditions Typ Guaranteed Units Limit fMAX Maximum Operating 60 35 MHz Frequency tPHL, tPLH Maximum Propagation 15 25 ns Delay, Clock to Q or Q tPHL, tPLH Maximum Propagation 13 21 ns Delay, Reset to Q or Q tREC Minimum Removal 20 ns Time, Clear to Clock tS Minimum Setup Time, Data to Clock 20 ns tH Minimum Hold Time, Data from Clock 0 ns tW Minimum Pulse Width, Clock or Clear 10 16 ns Symbol Parameter Conditions VCC TA = 25°CTA = −40 to 85°CTA = −55 to 125°C Units Typ Guaranteed Limits fMAX Maximum Operating 2.0V 12 6 5 4 MHz Frequency 4.5V 60 30 24 20 MHz 6.0V 70 35 28 24 MHz tPHL, tPLH Maximum Propagation 2.0V 80 150 190 225 ns Delay, Clock to Q or Q 4.5V 15 30 38 45 ns 6.0V 13 26 32 38 ns tPHL, tPLH Maximum Propagation 2.0V 64 125 158 186 ns Delay, Reset to Q or Q 4.5V 14 25 32 37 ns 6.0V 12 21 27 32 ns tREM Minimum Removal Time 2.0V 100 125 150 ns Clear to Clock 4.5V 20 25 30 ns 6.0V 17 21 25 ns tS Minimum Setup Time 2.0V 100 125 150 ns Data to Clock 4.5V 20 25 30 ns 6.0V 17 21 25 ns tH Minimum Hold Time 2.0V 0 0 0 ns Data from Clock 4.5V 0 0 0 ns 6.0V 0 0 0 ns tW Minimum Pulse Width 2.0V 30 80 100 120 ns Clear or Clock 4.5V 9 16 20 24 ns 6.0V 8 14 17 20 ns tr, tf Maximum Input Rise and 2.0V 1000 1000 1000 ns Fall Time 4.5V 500 500 500 ns 6.0V 400 400 400 ns tTLH, tTHL Maximum 2.0V 30 75 95 110 ns Output Rise and 4.5V 9 15 19 22 ns Fall Time 6.0V 8 13 16 19 ns CPD Power Dissipation (per package) 150 pF Capacitance (Note 5) CIN Maximum Input 5 10 10 10 pF Capacitance |
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