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74HCT74PW Datasheet(PDF) 3 Page - NXP Semiconductors |
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74HCT74PW Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 22 page 74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 — 27 August 2012 3 of 21 NXP Semiconductors 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive edge-trigger 5. Pinning information 5.1 Pinning 5.2 Pin description (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 5. Pin configuration for DIP14, SO14 and (T)SSOP14 Fig 6. Pin configuration for DHVQFN14 +& +&7 5' 9&& ' 5' &3 ' 6' &3 4 6' 4 4 *1' 4 DDD DDD +& +&7 7UDQVSDUHQW WRS YLHZ 4 4 4 6' 6' &3 &3 ' ' 5' *1' WHUPLQDO LQGH[DUHD Table 2. Pin description Symbol Pin Description 1RD 1 asynchronous reset-direct input (active LOW) 1D 2 data input 1CP 3 clock input (LOW-to-HIGH, edge-triggered) 1SD 4 asynchronous set-direct input (active LOW) 1Q 5 output 1Q 6 complement output GND 7 ground (0 V) 2Q 8 complement output 2Q 9 output 2SD 10 asynchronous set-direct input (active LOW) 2CP 11 clock input (LOW-to-HIGH, edge-triggered) 2D 12 data input 2RD 13 asynchronous reset-direct input (active LOW) VCC 14 supply voltage |
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